base_dyn_inst.hh (5358:e9acb84bbafb) | base_dyn_inst.hh (5543:3af77710f397) |
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1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 63 unchanged lines hidden (view full) --- 72 73 // The DynInstPtr type. 74 typedef typename Impl::DynInstPtr DynInstPtr; 75 76 // The list of instructions iterator type. 77 typedef typename std::list<DynInstPtr>::iterator ListIt; 78 79 enum { | 1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 63 unchanged lines hidden (view full) --- 72 73 // The DynInstPtr type. 74 typedef typename Impl::DynInstPtr DynInstPtr; 75 76 // The list of instructions iterator type. 77 typedef typename std::list<DynInstPtr>::iterator ListIt; 78 79 enum { |
80 MaxInstSrcRegs = TheISA::MaxInstSrcRegs, /// Max source regs 81 MaxInstDestRegs = TheISA::MaxInstDestRegs, /// Max dest regs | 80 MaxInstSrcRegs = TheISA::MaxInstSrcRegs, /// Max source regs 81 MaxInstDestRegs = TheISA::MaxInstDestRegs, /// Max dest regs |
82 }; 83 84 /** The StaticInst used by this BaseDynInst. */ 85 StaticInstPtr staticInst; 86 87 //////////////////////////////////////////// 88 // 89 // INSTRUCTION EXECUTION --- 391 unchanged lines hidden (view full) --- 481 return readPredPC() != readNextPC() || 482 readPredNPC() != readNextNPC() || 483 readPredMicroPC() != readNextMicroPC(); 484 } 485 486 // 487 // Instruction types. Forward checks to StaticInst object. 488 // | 82 }; 83 84 /** The StaticInst used by this BaseDynInst. */ 85 StaticInstPtr staticInst; 86 87 //////////////////////////////////////////// 88 // 89 // INSTRUCTION EXECUTION --- 391 unchanged lines hidden (view full) --- 481 return readPredPC() != readNextPC() || 482 readPredNPC() != readNextNPC() || 483 readPredMicroPC() != readNextMicroPC(); 484 } 485 486 // 487 // Instruction types. Forward checks to StaticInst object. 488 // |
489 bool isNop() const { return staticInst->isNop(); } 490 bool isMemRef() const { return staticInst->isMemRef(); } 491 bool isLoad() const { return staticInst->isLoad(); } 492 bool isStore() const { return staticInst->isStore(); } | 489 bool isNop() const { return staticInst->isNop(); } 490 bool isMemRef() const { return staticInst->isMemRef(); } 491 bool isLoad() const { return staticInst->isLoad(); } 492 bool isStore() const { return staticInst->isStore(); } |
493 bool isStoreConditional() const 494 { return staticInst->isStoreConditional(); } 495 bool isInstPrefetch() const { return staticInst->isInstPrefetch(); } 496 bool isDataPrefetch() const { return staticInst->isDataPrefetch(); } 497 bool isCopy() const { return staticInst->isCopy(); } | 493 bool isStoreConditional() const 494 { return staticInst->isStoreConditional(); } 495 bool isInstPrefetch() const { return staticInst->isInstPrefetch(); } 496 bool isDataPrefetch() const { return staticInst->isDataPrefetch(); } 497 bool isCopy() const { return staticInst->isCopy(); } |
498 bool isInteger() const { return staticInst->isInteger(); } 499 bool isFloating() const { return staticInst->isFloating(); } 500 bool isControl() const { return staticInst->isControl(); } 501 bool isCall() const { return staticInst->isCall(); } 502 bool isReturn() const { return staticInst->isReturn(); } 503 bool isDirectCtrl() const { return staticInst->isDirectCtrl(); } | 498 bool isInteger() const { return staticInst->isInteger(); } 499 bool isFloating() const { return staticInst->isFloating(); } 500 bool isControl() const { return staticInst->isControl(); } 501 bool isCall() const { return staticInst->isCall(); } 502 bool isReturn() const { return staticInst->isReturn(); } 503 bool isDirectCtrl() const { return staticInst->isDirectCtrl(); } |
504 bool isIndirectCtrl() const { return staticInst->isIndirectCtrl(); } | 504 bool isIndirectCtrl() const { return staticInst->isIndirectCtrl(); } |
505 bool isCondCtrl() const { return staticInst->isCondCtrl(); } 506 bool isUncondCtrl() const { return staticInst->isUncondCtrl(); } | 505 bool isCondCtrl() const { return staticInst->isCondCtrl(); } 506 bool isUncondCtrl() const { return staticInst->isUncondCtrl(); } |
507 bool isCondDelaySlot() const { return staticInst->isCondDelaySlot(); } 508 bool isThreadSync() const { return staticInst->isThreadSync(); } 509 bool isSerializing() const { return staticInst->isSerializing(); } 510 bool isSerializeBefore() const 511 { return staticInst->isSerializeBefore() || status[SerializeBefore]; } 512 bool isSerializeAfter() const 513 { return staticInst->isSerializeAfter() || status[SerializeAfter]; } 514 bool isMemBarrier() const { return staticInst->isMemBarrier(); } --- 40 unchanged lines hidden (view full) --- 555 556 /** Returns the opclass of this instruction. */ 557 OpClass opClass() const { return staticInst->opClass(); } 558 559 /** Returns the branch target address. */ 560 Addr branchTarget() const { return staticInst->branchTarget(PC); } 561 562 /** Returns the number of source registers. */ | 507 bool isCondDelaySlot() const { return staticInst->isCondDelaySlot(); } 508 bool isThreadSync() const { return staticInst->isThreadSync(); } 509 bool isSerializing() const { return staticInst->isSerializing(); } 510 bool isSerializeBefore() const 511 { return staticInst->isSerializeBefore() || status[SerializeBefore]; } 512 bool isSerializeAfter() const 513 { return staticInst->isSerializeAfter() || status[SerializeAfter]; } 514 bool isMemBarrier() const { return staticInst->isMemBarrier(); } --- 40 unchanged lines hidden (view full) --- 555 556 /** Returns the opclass of this instruction. */ 557 OpClass opClass() const { return staticInst->opClass(); } 558 559 /** Returns the branch target address. */ 560 Addr branchTarget() const { return staticInst->branchTarget(PC); } 561 562 /** Returns the number of source registers. */ |
563 int8_t numSrcRegs() const { return staticInst->numSrcRegs(); } | 563 int8_t numSrcRegs() const { return staticInst->numSrcRegs(); } |
564 565 /** Returns the number of destination registers. */ 566 int8_t numDestRegs() const { return staticInst->numDestRegs(); } 567 568 // the following are used to track physical register usage 569 // for machines with separate int & FP reg files 570 int8_t numFPDestRegs() const { return staticInst->numFPDestRegs(); } 571 int8_t numIntDestRegs() const { return staticInst->numIntDestRegs(); } --- 431 unchanged lines hidden --- | 564 565 /** Returns the number of destination registers. */ 566 int8_t numDestRegs() const { return staticInst->numDestRegs(); } 567 568 // the following are used to track physical register usage 569 // for machines with separate int & FP reg files 570 int8_t numFPDestRegs() const { return staticInst->numFPDestRegs(); } 571 int8_t numIntDestRegs() const { return staticInst->numIntDestRegs(); } --- 431 unchanged lines hidden --- |