base_dyn_inst.hh (3801:5ea378e2bccd) base_dyn_inst.hh (3965:b4cab77371ed)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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204 Result instResult;
205
206 /** Records changes to result? */
207 bool recordResult;
208
209 /** PC of this instruction. */
210 Addr PC;
211
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 195 unchanged lines hidden (view full) ---

204 Result instResult;
205
206 /** Records changes to result? */
207 bool recordResult;
208
209 /** PC of this instruction. */
210 Addr PC;
211
212 protected:
212 /** Next non-speculative PC. It is not filled in at fetch, but rather
213 * once the target of the branch is truly known (either decode or
214 * execute).
215 */
216 Addr nextPC;
217
218 /** Next non-speculative NPC. Target PC for Mips or Sparc. */
219 Addr nextNPC;
220
221 /** Predicted next PC. */
222 Addr predPC;
223
224 /** Predicted next NPC. */
225 Addr predNPC;
226
227 /** If this is a branch that was predicted taken */
228 bool predTaken;
229
213 /** Next non-speculative PC. It is not filled in at fetch, but rather
214 * once the target of the branch is truly known (either decode or
215 * execute).
216 */
217 Addr nextPC;
218
219 /** Next non-speculative NPC. Target PC for Mips or Sparc. */
220 Addr nextNPC;
221
222 /** Predicted next PC. */
223 Addr predPC;
224
225 /** Predicted next NPC. */
226 Addr predNPC;
227
228 /** If this is a branch that was predicted taken */
229 bool predTaken;
230
231 public:
232
230 /** Count of total number of dynamic instructions. */
231 static int instcount;
232
233#ifdef DEBUG
234 void dumpSNList();
235#endif
236
237 /** Whether or not the source register is ready.

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385 /** Returns the next PC. This could be the speculative next PC if it is
386 * called prior to the actual branch target being calculated.
387 */
388 Addr readNextPC() { return nextPC; }
389
390 /** Returns the next NPC. This could be the speculative next NPC if it is
391 * called prior to the actual branch target being calculated.
392 */
233 /** Count of total number of dynamic instructions. */
234 static int instcount;
235
236#ifdef DEBUG
237 void dumpSNList();
238#endif
239
240 /** Whether or not the source register is ready.

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388 /** Returns the next PC. This could be the speculative next PC if it is
389 * called prior to the actual branch target being calculated.
390 */
391 Addr readNextPC() { return nextPC; }
392
393 /** Returns the next NPC. This could be the speculative next NPC if it is
394 * called prior to the actual branch target being calculated.
395 */
393 Addr readNextNPC() { return nextNPC; }
396 Addr readNextNPC()
397 {
398#if ISA_HAS_DELAY_SLOT
399 return nextNPC;
400#else
401 return nextPC + sizeof(TheISA::MachInst);
402#endif
403 }
394
395 /** Set the predicted target of this current instruction. */
396 void setPredTarg(Addr predicted_PC, Addr predicted_NPC)
397 {
398 predPC = predicted_PC;
399 predNPC = predicted_NPC;
400 }
401

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414 void setPredTaken(bool predicted_taken)
415 {
416 predTaken = predicted_taken;
417 }
418
419 /** Returns whether the instruction mispredicted. */
420 bool mispredicted()
421 {
404
405 /** Set the predicted target of this current instruction. */
406 void setPredTarg(Addr predicted_PC, Addr predicted_NPC)
407 {
408 predPC = predicted_PC;
409 predNPC = predicted_NPC;
410 }
411

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424 void setPredTaken(bool predicted_taken)
425 {
426 predTaken = predicted_taken;
427 }
428
429 /** Returns whether the instruction mispredicted. */
430 bool mispredicted()
431 {
422 return predPC != nextPC || predNPC != nextNPC;
432 return readPredPC() != readNextPC() ||
433 readPredNPC() != readNextNPC();
423 }
424
425 //
426 // Instruction types. Forward checks to StaticInst object.
427 //
428 bool isNop() const { return staticInst->isNop(); }
429 bool isMemRef() const { return staticInst->isMemRef(); }
430 bool isLoad() const { return staticInst->isLoad(); }

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435
436 //
437 // Instruction types. Forward checks to StaticInst object.
438 //
439 bool isNop() const { return staticInst->isNop(); }
440 bool isMemRef() const { return staticInst->isMemRef(); }
441 bool isLoad() const { return staticInst->isLoad(); }

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