base_dyn_inst.hh (12105:742d80361989) base_dyn_inst.hh (12106:7784fac1b159)
1/*
2 * Copyright (c) 2011,2013 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 369 unchanged lines hidden (view full) ---

378 {
379 assert(TheISA::MaxInstSrcRegs > idx);
380 return _srcRegIdx[idx];
381 }
382
383 /** Returns the flattened register index of the i'th destination
384 * register.
385 */
1/*
2 * Copyright (c) 2011,2013 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 369 unchanged lines hidden (view full) ---

378 {
379 assert(TheISA::MaxInstSrcRegs > idx);
380 return _srcRegIdx[idx];
381 }
382
383 /** Returns the flattened register index of the i'th destination
384 * register.
385 */
386 RegId flattenedDestRegIdx(int idx) const
386 const RegId& flattenedDestRegIdx(int idx) const
387 {
388 return _flatDestRegIdx[idx];
389 }
390
391 /** Returns the physical register index of the previous physical register
392 * that remapped to the same logical register index.
393 */
394 PhysRegIdPtr prevDestRegIdx(int idx) const

--- 19 unchanged lines hidden (view full) ---

414 void renameSrcReg(int idx, PhysRegIdPtr renamed_src)
415 {
416 _srcRegIdx[idx] = renamed_src;
417 }
418
419 /** Flattens a destination architectural register index into a logical
420 * index.
421 */
387 {
388 return _flatDestRegIdx[idx];
389 }
390
391 /** Returns the physical register index of the previous physical register
392 * that remapped to the same logical register index.
393 */
394 PhysRegIdPtr prevDestRegIdx(int idx) const

--- 19 unchanged lines hidden (view full) ---

414 void renameSrcReg(int idx, PhysRegIdPtr renamed_src)
415 {
416 _srcRegIdx[idx] = renamed_src;
417 }
418
419 /** Flattens a destination architectural register index into a logical
420 * index.
421 */
422 void flattenDestReg(int idx, RegId flattened_dest)
422 void flattenDestReg(int idx, const RegId& flattened_dest)
423 {
424 _flatDestRegIdx[idx] = flattened_dest;
425 }
426 /** BaseDynInst constructor given a binary instruction.
427 * @param staticInst A StaticInstPtr to the underlying instruction.
428 * @param pc The PC state for the instruction.
429 * @param predPC The predicted next PC state for the instruction.
430 * @param seq_num The sequence number of the instruction.

--- 165 unchanged lines hidden (view full) ---

596
597 // the following are used to track physical register usage
598 // for machines with separate int & FP reg files
599 int8_t numFPDestRegs() const { return staticInst->numFPDestRegs(); }
600 int8_t numIntDestRegs() const { return staticInst->numIntDestRegs(); }
601 int8_t numCCDestRegs() const { return staticInst->numCCDestRegs(); }
602
603 /** Returns the logical register index of the i'th destination register. */
423 {
424 _flatDestRegIdx[idx] = flattened_dest;
425 }
426 /** BaseDynInst constructor given a binary instruction.
427 * @param staticInst A StaticInstPtr to the underlying instruction.
428 * @param pc The PC state for the instruction.
429 * @param predPC The predicted next PC state for the instruction.
430 * @param seq_num The sequence number of the instruction.

--- 165 unchanged lines hidden (view full) ---

596
597 // the following are used to track physical register usage
598 // for machines with separate int & FP reg files
599 int8_t numFPDestRegs() const { return staticInst->numFPDestRegs(); }
600 int8_t numIntDestRegs() const { return staticInst->numIntDestRegs(); }
601 int8_t numCCDestRegs() const { return staticInst->numCCDestRegs(); }
602
603 /** Returns the logical register index of the i'th destination register. */
604 RegId destRegIdx(int i) const { return staticInst->destRegIdx(i); }
604 const RegId& destRegIdx(int i) const { return staticInst->destRegIdx(i); }
605
606 /** Returns the logical register index of the i'th source register. */
605
606 /** Returns the logical register index of the i'th source register. */
607 RegId srcRegIdx(int i) const { return staticInst->srcRegIdx(i); }
607 const RegId& srcRegIdx(int i) const { return staticInst->srcRegIdx(i); }
608
609 /** Pops a result off the instResult queue */
610 template <class T>
611 void popResult(T& t)
612 {
613 if (!instResult.empty()) {
614 instResult.front().get(t);
615 instResult.pop();

--- 465 unchanged lines hidden --- 		608
609 /** Pops a result off the instResult queue */
610 template <class T>
611 void popResult(T& t)
612 {
613 if (!instResult.empty()) {
614 instResult.front().get(t);
615 instResult.pop();

--- 465 unchanged lines hidden ---