base_dyn_inst.hh (11608:6319a1125f1c) base_dyn_inst.hh (12104:edd63f9c6184)
1/*
2 * Copyright (c) 2011,2013 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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77template <class Impl>
78class BaseDynInst : public ExecContext, public RefCounted
79{
80 public:
81 // Typedef for the CPU.
82 typedef typename Impl::CPUType ImplCPU;
83 typedef typename ImplCPU::ImplState ImplState;
84
1/*
2 * Copyright (c) 2011,2013 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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77template <class Impl>
78class BaseDynInst : public ExecContext, public RefCounted
79{
80 public:
81 // Typedef for the CPU.
82 typedef typename Impl::CPUType ImplCPU;
83 typedef typename ImplCPU::ImplState ImplState;
84
85 // Logical register index type.
86 typedef TheISA::RegIndex RegIndex;
87
88 // The DynInstPtr type.
89 typedef typename Impl::DynInstPtr DynInstPtr;
90 typedef RefCountingPtr<BaseDynInst<Impl> > BaseDynInstPtr;
91
92 // The list of instructions iterator type.
93 typedef typename std::list<DynInstPtr>::iterator ListIt;
94
95 enum {

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260 * @todo: Consider if this is necessary or not.
261 */
262 Addr instEffAddr;
263
264 protected:
265 /** Flattened register index of the destination registers of this
266 * instruction.
267 */
85 // The DynInstPtr type.
86 typedef typename Impl::DynInstPtr DynInstPtr;
87 typedef RefCountingPtr<BaseDynInst<Impl> > BaseDynInstPtr;
88
89 // The list of instructions iterator type.
90 typedef typename std::list<DynInstPtr>::iterator ListIt;
91
92 enum {

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257 * @todo: Consider if this is necessary or not.
258 */
259 Addr instEffAddr;
260
261 protected:
262 /** Flattened register index of the destination registers of this
263 * instruction.
264 */
268 std::array<TheISA::RegIndex, TheISA::MaxInstDestRegs> _flatDestRegIdx;
265 std::array<RegId, TheISA::MaxInstDestRegs> _flatDestRegIdx;
269
270 /** Physical register index of the destination registers of this
271 * instruction.
272 */
273 std::array<PhysRegIndex, TheISA::MaxInstDestRegs> _destRegIdx;
274
275 /** Physical register index of the source registers of this
276 * instruction.

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381 {
382 assert(TheISA::MaxInstSrcRegs > idx);
383 return _srcRegIdx[idx];
384 }
385
386 /** Returns the flattened register index of the i'th destination
387 * register.
388 */
266
267 /** Physical register index of the destination registers of this
268 * instruction.
269 */
270 std::array<PhysRegIndex, TheISA::MaxInstDestRegs> _destRegIdx;
271
272 /** Physical register index of the source registers of this
273 * instruction.

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378 {
379 assert(TheISA::MaxInstSrcRegs > idx);
380 return _srcRegIdx[idx];
381 }
382
383 /** Returns the flattened register index of the i'th destination
384 * register.
385 */
389 TheISA::RegIndex flattenedDestRegIdx(int idx) const
386 RegId flattenedDestRegIdx(int idx) const
390 {
391 return _flatDestRegIdx[idx];
392 }
393
394 /** Returns the physical register index of the previous physical register
395 * that remapped to the same logical register index.
396 */
397 PhysRegIndex prevDestRegIdx(int idx) const

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417 void renameSrcReg(int idx, PhysRegIndex renamed_src)
418 {
419 _srcRegIdx[idx] = renamed_src;
420 }
421
422 /** Flattens a destination architectural register index into a logical
423 * index.
424 */
387 {
388 return _flatDestRegIdx[idx];
389 }
390
391 /** Returns the physical register index of the previous physical register
392 * that remapped to the same logical register index.
393 */
394 PhysRegIndex prevDestRegIdx(int idx) const

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414 void renameSrcReg(int idx, PhysRegIndex renamed_src)
415 {
416 _srcRegIdx[idx] = renamed_src;
417 }
418
419 /** Flattens a destination architectural register index into a logical
420 * index.
421 */
425 void flattenDestReg(int idx, TheISA::RegIndex flattened_dest)
422 void flattenDestReg(int idx, RegId flattened_dest)
426 {
427 _flatDestRegIdx[idx] = flattened_dest;
428 }
429 /** BaseDynInst constructor given a binary instruction.
430 * @param staticInst A StaticInstPtr to the underlying instruction.
431 * @param pc The PC state for the instruction.
432 * @param predPC The predicted next PC state for the instruction.
433 * @param seq_num The sequence number of the instruction.

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599
600 // the following are used to track physical register usage
601 // for machines with separate int & FP reg files
602 int8_t numFPDestRegs() const { return staticInst->numFPDestRegs(); }
603 int8_t numIntDestRegs() const { return staticInst->numIntDestRegs(); }
604 int8_t numCCDestRegs() const { return staticInst->numCCDestRegs(); }
605
606 /** Returns the logical register index of the i'th destination register. */
423 {
424 _flatDestRegIdx[idx] = flattened_dest;
425 }
426 /** BaseDynInst constructor given a binary instruction.
427 * @param staticInst A StaticInstPtr to the underlying instruction.
428 * @param pc The PC state for the instruction.
429 * @param predPC The predicted next PC state for the instruction.
430 * @param seq_num The sequence number of the instruction.

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596
597 // the following are used to track physical register usage
598 // for machines with separate int & FP reg files
599 int8_t numFPDestRegs() const { return staticInst->numFPDestRegs(); }
600 int8_t numIntDestRegs() const { return staticInst->numIntDestRegs(); }
601 int8_t numCCDestRegs() const { return staticInst->numCCDestRegs(); }
602
603 /** Returns the logical register index of the i'th destination register. */
607 RegIndex destRegIdx(int i) const { return staticInst->destRegIdx(i); }
604 RegId destRegIdx(int i) const { return staticInst->destRegIdx(i); }
608
609 /** Returns the logical register index of the i'th source register. */
605
606 /** Returns the logical register index of the i'th source register. */
610 RegIndex srcRegIdx(int i) const { return staticInst->srcRegIdx(i); }
607 RegId srcRegIdx(int i) const { return staticInst->srcRegIdx(i); }
611
612 /** Pops a result off the instResult queue */
613 template <class T>
614 void popResult(T& t)
615 {
616 if (!instResult.empty()) {
617 instResult.front().get(t);
618 instResult.pop();

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609 /** Pops a result off the instResult queue */
610 template <class T>
611 void popResult(T& t)
612 {
613 if (!instResult.empty()) {
614 instResult.front().get(t);
615 instResult.pop();

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