217a218,220
> /** Next non-speculative NPC. Target PC for Mips or Sparc. */
> Addr nextNPC;
>
277a281,285
> /** Returns the next NPC. This could be the speculative next NPC if it is
> * called prior to the actual branch target being calculated.
> */
> Addr readNextNPC() { return nextNPC; }
>
285c293,298
< bool predTaken() { return predPC != (PC + sizeof(MachInst)); }
---
> bool predTaken()
> #if THE_ISA == ALPHA_ISA
> { return predPC != (PC + sizeof(MachInst)); }
> #else
> { return predPC != (nextPC + sizeof(MachInst)); }
> #endif
288,289c301,306
< bool mispredicted() { return predPC != nextPC; }
<
---
> bool mispredicted()
> #if THE_ISA == ALPHA_ISA
> { return predPC != nextPC; }
> #else
> { return predPC != nextNPC; }
> #endif
310a328
> bool isCondDelaySlot() const { return staticInst->isCondDelaySlot(); }
547a566,571
> /** Set the next NPC of this instruction (the target in Mips or Sparc).*/
> void setNextNPC(uint64_t val)
> {
> nextNPC = val;
> }
>