118,120d117
< Fault translateDataReadAddr(Addr vaddr, Addr &paddr,
< int size, unsigned flags);
<
133,135d129
< Fault translateDataWriteAddr(Addr vaddr, Addr &paddr,
< int size, unsigned flags);
<
860,882d853
< Fault
< BaseDynInst<Impl>::translateDataReadAddr(Addr vaddr, Addr &paddr,
< int size, unsigned flags)
< {
< if (traceData) {
< traceData->setAddr(vaddr);
< }
<
< reqMade = true;
< Request *req = new Request();
< req->setVirt(asid, vaddr, size, flags, PC);
< req->setThreadContext(thread->contextId(), threadNumber);
<
< fault = cpu->translateDataReadReq(req, thread);
<
< if (fault == NoFault)
< paddr = req->getPaddr();
<
< delete req;
< return fault;
< }
<
< template<class Impl>
892c863
< fault = cpu->translateDataReadReq(req, thread);
---
> fault = cpu->dtb->translate(req, thread->getTC(), false);
934,956d904
< Fault
< BaseDynInst<Impl>::translateDataWriteAddr(Addr vaddr, Addr &paddr,
< int size, unsigned flags)
< {
< if (traceData) {
< traceData->setAddr(vaddr);
< }
<
< reqMade = true;
< Request *req = new Request();
< req->setVirt(asid, vaddr, size, flags, PC);
< req->setThreadContext(thread->contextId(), threadNumber);
<
< fault = cpu->translateDataWriteReq(req, thread);
<
< if (fault == NoFault)
< paddr = req->getPaddr();
<
< delete req;
< return fault;
< }
<
< template<class Impl>
971c919
< fault = cpu->translateDataWriteReq(req, thread);
---
> fault = cpu->dtb->translate(req, thread->getTC(), true);