104a105,107
> Fault translateDataReadAddr(Addr vaddr, Addr &paddr,
> int size, unsigned flags);
>
116a120,122
> Fault translateDataWriteAddr(Addr vaddr, Addr &paddr,
> int size, unsigned flags);
>
840a847,869
> Fault
> BaseDynInst<Impl>::translateDataReadAddr(Addr vaddr, Addr &paddr,
> int size, unsigned flags)
> {
> if (traceData) {
> traceData->setAddr(vaddr);
> }
>
> reqMade = true;
> Request *req = new Request();
> req->setVirt(asid, vaddr, size, flags, PC);
> req->setThreadContext(thread->readCpuId(), threadNumber);
>
> fault = cpu->translateDataReadReq(req, thread);
>
> if (fault == NoFault)
> paddr = req->getPaddr();
>
> delete req;
> return fault;
> }
>
> template<class Impl>
891a921,943
> Fault
> BaseDynInst<Impl>::translateDataWriteAddr(Addr vaddr, Addr &paddr,
> int size, unsigned flags)
> {
> if (traceData) {
> traceData->setAddr(vaddr);
> }
>
> reqMade = true;
> Request *req = new Request();
> req->setVirt(asid, vaddr, size, flags, PC);
> req->setThreadContext(thread->readCpuId(), threadNumber);
>
> fault = cpu->translateDataWriteReq(req, thread);
>
> if (fault == NoFault)
> paddr = req->getPaddr();
>
> delete req;
> return fault;
> }
>
> template<class Impl>