1/*
2 * Copyright (c) 2011,2013 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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858 { return thread->storeCondFailures; }
859
860 /** Sets the number of consecutive store conditional failures. */
861 void setStCondFailures(unsigned int sc_failures)
862 { thread->storeCondFailures = sc_failures; }
863
864 public:
865 // monitor/mwait funtions
866 void armMonitor(Addr address) { cpu->armMonitor(address); }
867 bool mwait(PacketPtr pkt) { return cpu->mwait(pkt); }
868 void mwaitAtomic(ThreadContext *tc)
869 { return cpu->mwaitAtomic(tc, cpu->dtb); }
870 AddressMonitor *getAddrMonitor() { return cpu->getCpuAddrMonitor(); }
871};
872
873template<class Impl>
874Fault
875BaseDynInst<Impl>::readMem(Addr addr, uint8_t *data,
876 unsigned size, unsigned flags)
877{
878 instFlags[ReqMade] = true;

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