1/*
2 * Copyright (c) 2011 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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119 {
120 cpu->demapPage(vaddr, asn);
121 }
122 void demapDataPage(Addr vaddr, uint64_t asn)
123 {
124 cpu->demapPage(vaddr, asn);
125 }
126
127 Fault readBytes(Addr addr, uint8_t *data, unsigned size, unsigned flags);
128
129 Fault writeBytes(uint8_t *data, unsigned size,
130 Addr addr, unsigned flags, uint64_t *res);
131
132 /** Splits a request in two if it crosses a dcache block. */
133 void splitRequest(RequestPtr req, RequestPtr &sreqLow,
134 RequestPtr &sreqHigh);
135
136 /** Initiate a DTB address translation. */

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887 if (traceData) {
888 traceData->setAddr(addr);
889 }
890
891 return fault;
892}
893
894template<class Impl>
895Fault
896BaseDynInst<Impl>::writeBytes(uint8_t *data, unsigned size,
897 Addr addr, unsigned flags, uint64_t *res)
898{
899 if (traceData) {
900 traceData->setAddr(addr);
901 }
902

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926 effAddrValid = true;
927 fault = cpu->write(req, sreqLow, sreqHigh, data, sqIdx);
928 }
929
930 return fault;
931}
932
933template<class Impl>
934inline void
935BaseDynInst<Impl>::splitRequest(RequestPtr req, RequestPtr &sreqLow,
936 RequestPtr &sreqHigh)
937{
938 // Check to see if the request crosses the next level block boundary.
939 unsigned block_size = cpu->getDcachePort()->peerBlockSize();
940 Addr addr = req->getVaddr();
941 Addr split_addr = roundDown(addr + req->getSize() - 1, block_size);

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