1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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704 void setNextPC(uint64_t val)
705 {
706 nextPC = val;
707 }
708
709 /** Set the next NPC of this instruction (the target in Mips or Sparc).*/
710 void setNextNPC(uint64_t val)
711 {
712#if ISA_HAS_DELAY_SLOT
713 nextNPC = val;
714#endif
715 }
716
717 /** Sets the ASID. */
718 void setASID(short addr_space_id) { asid = addr_space_id; }
719
720 /** Sets the thread id. */
721 void setTid(unsigned tid) { threadNumber = tid; }
722

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