1/*
2 * Copyright (c) 2011, 2013, 2016-2018 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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579 int8_t numFPDestRegs() const { return staticInst->numFPDestRegs(); }
580 int8_t numIntDestRegs() const { return staticInst->numIntDestRegs(); }
581 int8_t numCCDestRegs() const { return staticInst->numCCDestRegs(); }
582 int8_t numVecDestRegs() const { return staticInst->numVecDestRegs(); }
583 int8_t numVecElemDestRegs() const
584 {
585 return staticInst->numVecElemDestRegs();
586 }
587 int8_t
588 numVecPredDestRegs() const
589 {
590 return staticInst->numVecPredDestRegs();
591 }
592
593 /** Returns the logical register index of the i'th destination register. */
594 const RegId& destRegIdx(int i) const { return staticInst->destRegIdx(i); }
595
596 /** Returns the logical register index of the i'th source register. */
597 const RegId& srcRegIdx(int i) const { return staticInst->srcRegIdx(i); }
598
599 /** Return the size of the instResult queue. */

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638 template<typename T>
639 void setVecElemResult(T&& t)
640 {
641 if (instFlags[RecordResult]) {
642 instResult.push(InstResult(std::forward<T>(t),
643 InstResult::ResultType::VecElem));
644 }
645 }
646
647 /** Predicate result. */
648 template<typename T>
649 void setVecPredResult(T&& t)
650 {
651 if (instFlags[RecordResult]) {
652 instResult.push(InstResult(std::forward<T>(t),
653 InstResult::ResultType::VecPredReg));
654 }
655 }
656 /** @} */
657
658 /** Records an integer register being set to a value. */
659 void setIntRegOperand(const StaticInst *si, int idx, RegVal val)
660 {
661 setScalarResult(val);
662 }
663

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682 }
683
684 /** Record a vector register being set to a value */
685 void setVecElemOperand(const StaticInst *si, int idx, const VecElem val)
686 {
687 setVecElemResult(val);
688 }
689
690 /** Record a vector register being set to a value */
691 void setVecPredRegOperand(const StaticInst *si, int idx,
692 const VecPredRegContainer& val)
693 {
694 setVecPredResult(val);
695 }
696
697 /** Records that one of the source registers is ready. */
698 void markSrcRegReady();
699
700 /** Marks a specific register as ready. */
701 void markSrcRegReady(RegIndex src_idx);
702
703 /** Returns if a source register is ready. */
704 bool isReadySrcRegIdx(int idx) const

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