base.hh (8662:d4548b381e87) | base.hh (8707:489489c67fd9) |
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1/* | 1/* |
2 * Copyright (c) 2011 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * |
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2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * Copyright (c) 2011 Regents of the University of California 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer; --- 80 unchanged lines hidden (view full) --- 90 // @todo remove me after debugging with legion done 91 Tick instCnt; 92 // every cpu has an id, put it in the base cpu 93 // Set at initialization, only time a cpuId might change is during a 94 // takeover (which should be done from within the BaseCPU anyway, 95 // therefore no setCpuId() method is provided 96 int _cpuId; 97 | 14 * Copyright (c) 2002-2005 The Regents of The University of Michigan 15 * Copyright (c) 2011 Regents of the University of California 16 * All rights reserved. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions are 20 * met: redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer; --- 80 unchanged lines hidden (view full) --- 102 // @todo remove me after debugging with legion done 103 Tick instCnt; 104 // every cpu has an id, put it in the base cpu 105 // Set at initialization, only time a cpuId might change is during a 106 // takeover (which should be done from within the BaseCPU anyway, 107 // therefore no setCpuId() method is provided 108 int _cpuId; 109 |
110 /** 111 * Define a base class for the CPU ports (instruction and data) 112 * that is refined in the subclasses. This class handles the 113 * common cases, i.e. the functional accesses and the status 114 * changes and address range queries. The default behaviour for 115 * both atomic and timing access is to panic and the corresponding 116 * subclasses have to override these methods. 117 */ 118 class CpuPort : public Port 119 { 120 public: 121 122 /** 123 * Create a CPU port with a name and a structural owner. 124 * 125 * @param _name port name including the owner 126 * @param _name structural owner of this port 127 */ 128 CpuPort(const std::string& _name, MemObject* _owner) : 129 Port(_name, _owner), snoopRangeSent(false) 130 { } 131 132 protected: 133 134 virtual bool recvTiming(PacketPtr pkt); 135 136 virtual Tick recvAtomic(PacketPtr pkt); 137 138 virtual void recvRetry(); 139 140 void recvFunctional(PacketPtr pkt); 141 142 void recvStatusChange(Status status); 143 144 /** 145 * Add CPU ports are master ports and do not respond to any 146 * address ranges. Note that the LSQ snoops for specific ISAs 147 * and thus has to override this method. 148 * 149 * @param resp list of ranges this port responds to 150 * @param snoop indicating if the port snoops or not 151 */ 152 virtual void getDeviceAddressRanges(AddrRangeList& resp, 153 bool& snoop); 154 155 private: 156 157 bool snoopRangeSent; 158 159 }; 160 |
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98 public: 99 /** Reads this CPU's ID. */ 100 int cpuId() { return _cpuId; } 101 102// Tick currentTick; 103 inline Tick frequency() const { return SimClock::Frequency / clock; } 104 inline Tick ticks(int numCycles) const { return clock * numCycles; } 105 inline Tick curCycle() const { return curTick() / clock; } --- 218 unchanged lines hidden --- | 161 public: 162 /** Reads this CPU's ID. */ 163 int cpuId() { return _cpuId; } 164 165// Tick currentTick; 166 inline Tick frequency() const { return SimClock::Frequency / clock; } 167 inline Tick ticks(int numCycles) const { return clock * numCycles; } 168 inline Tick curCycle() const { return curTick() / clock; } --- 218 unchanged lines hidden --- |