base.hh (4182:5b2c0d266107) base.hh (4192:7accc6365bb9)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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29 * Nathan Binkert
30 */
31
32#ifndef __CPU_BASE_HH__
33#define __CPU_BASE_HH__
34
35#include <vector>
36
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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29 * Nathan Binkert
30 */
31
32#ifndef __CPU_BASE_HH__
33#define __CPU_BASE_HH__
34
35#include <vector>
36
37#include "arch/isa_traits.hh"
38#include "base/statistics.hh"
39#include "config/full_system.hh"
40#include "sim/eventq.hh"
41#include "mem/mem_object.hh"
37#include "base/statistics.hh"
38#include "config/full_system.hh"
39#include "sim/eventq.hh"
40#include "mem/mem_object.hh"
41#include "arch/isa_traits.hh"
42
43#if FULL_SYSTEM
44#include "arch/interrupts.hh"
45#endif
46
47class BranchPred;
48class CheckerCPU;
49class ThreadContext;
50class System;
51class Port;
52
42
43#if FULL_SYSTEM
44#include "arch/interrupts.hh"
45#endif
46
47class BranchPred;
48class CheckerCPU;
49class ThreadContext;
50class System;
51class Port;
52
53namespace TheISA
54{
55 class Predecoder;
56}
57
58class CPUProgressEvent : public Event
59{
60 protected:
61 Tick interval;
62 Counter lastNumInst;
63 BaseCPU *cpu;
64
65 public:

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125 ProfileEvent(BaseCPU *cpu, int interval);
126 void process();
127 };
128 ProfileEvent *profileEvent;
129#endif
130
131 protected:
132 std::vector<ThreadContext *> threadContexts;
53class CPUProgressEvent : public Event
54{
55 protected:
56 Tick interval;
57 Counter lastNumInst;
58 BaseCPU *cpu;
59
60 public:

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120 ProfileEvent(BaseCPU *cpu, int interval);
121 void process();
122 };
123 ProfileEvent *profileEvent;
124#endif
125
126 protected:
127 std::vector<ThreadContext *> threadContexts;
133 std::vector<TheISA::Predecoder *> predecoders;
134
135 public:
136
137 /// Notify the CPU that the indicated context is now active. The
138 /// delay parameter indicates the number of ticks to wait before
139 /// executing (typically 0 or 1).
140 virtual void activateContext(int thread_num, int delay) {}
141

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197 void registerThreadContexts();
198
199 /// Prepare for another CPU to take over execution. When it is
200 /// is ready (drained pipe) it signals the sampler.
201 virtual void switchOut();
202
203 /// Take over execution from the given CPU. Used for warm-up and
204 /// sampling.
128
129 public:
130
131 /// Notify the CPU that the indicated context is now active. The
132 /// delay parameter indicates the number of ticks to wait before
133 /// executing (typically 0 or 1).
134 virtual void activateContext(int thread_num, int delay) {}
135

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191 void registerThreadContexts();
192
193 /// Prepare for another CPU to take over execution. When it is
194 /// is ready (drained pipe) it signals the sampler.
195 virtual void switchOut();
196
197 /// Take over execution from the given CPU. Used for warm-up and
198 /// sampling.
205 virtual void takeOverFrom(BaseCPU *);
199 virtual void takeOverFrom(BaseCPU *, Port *ic, Port *dc);
206
207 /**
208 * Number of threads we're actually simulating (<= SMT_MAX_THREADS).
209 * This is a constant for the duration of the simulation.
210 */
211 int number_of_threads;
212
213 /**

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201 /**
202 * Number of threads we're actually simulating (<= SMT_MAX_THREADS).
203 * This is a constant for the duration of the simulation.
204 */
205 int number_of_threads;
206
207 /**

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