base.hh (10464:2a0fe8bca031) base.hh (10529:05b5a6cf3521)
1/*
2 * Copyright (c) 2011-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 50 unchanged lines hidden (view full) ---

59#include "arch/microcode_rom.hh"
60#include "base/statistics.hh"
61#include "mem/mem_object.hh"
62#include "sim/eventq.hh"
63#include "sim/full_system.hh"
64#include "sim/insttracer.hh"
65#include "sim/probe/pmu.hh"
66#include "sim/system.hh"
1/*
2 * Copyright (c) 2011-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 50 unchanged lines hidden (view full) ---

59#include "arch/microcode_rom.hh"
60#include "base/statistics.hh"
61#include "mem/mem_object.hh"
62#include "sim/eventq.hh"
63#include "sim/full_system.hh"
64#include "sim/insttracer.hh"
65#include "sim/probe/pmu.hh"
66#include "sim/system.hh"
67#include "debug/Mwait.hh"
67
68
69class BaseCPU;
68struct BaseCPUParams;
69class CheckerCPU;
70class ThreadContext;
71
70struct BaseCPUParams;
71class CheckerCPU;
72class ThreadContext;
73
74struct AddressMonitor
75{
76 AddressMonitor();
77 bool doMonitor(PacketPtr pkt);
78
79 bool armed;
80 Addr vAddr;
81 Addr pAddr;
82 uint64_t val;
83 bool waiting; // 0=normal, 1=mwaiting
84 bool gotWakeup;
85};
86
72class CPUProgressEvent : public Event
73{
74 protected:
75 Tick _interval;
76 Counter lastNumInst;
77 BaseCPU *cpu;
78 bool _repeatEvent;
79

--- 451 unchanged lines hidden (view full) ---

531 return total;
532 }
533
534 public:
535 // Number of CPU cycles simulated
536 Stats::Scalar numCycles;
537 Stats::Scalar numWorkItemsStarted;
538 Stats::Scalar numWorkItemsCompleted;
87class CPUProgressEvent : public Event
88{
89 protected:
90 Tick _interval;
91 Counter lastNumInst;
92 BaseCPU *cpu;
93 bool _repeatEvent;
94

--- 451 unchanged lines hidden (view full) ---

546 return total;
547 }
548
549 public:
550 // Number of CPU cycles simulated
551 Stats::Scalar numCycles;
552 Stats::Scalar numWorkItemsStarted;
553 Stats::Scalar numWorkItemsCompleted;
554
555 private:
556 AddressMonitor addressMonitor;
557
558 public:
559 void armMonitor(Addr address);
560 bool mwait(PacketPtr pkt);
561 void mwaitAtomic(ThreadContext *tc, TheISA::TLB *dtb);
562 AddressMonitor *getCpuAddrMonitor() { return &addressMonitor; }
563 void atomicNotify(Addr address);
539};
540
541#endif // THE_ISA == NULL_ISA
542
543#endif // __CPU_BASE_HH__
564};
565
566#endif // THE_ISA == NULL_ISA
567
568#endif // __CPU_BASE_HH__