base.hh (10408:a59c189de383) | base.hh (10464:2a0fe8bca031) |
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1/* 2 * Copyright (c) 2011-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 48 unchanged lines hidden (view full) --- 57#include "arch/interrupts.hh" 58#include "arch/isa_traits.hh" 59#include "arch/microcode_rom.hh" 60#include "base/statistics.hh" 61#include "mem/mem_object.hh" 62#include "sim/eventq.hh" 63#include "sim/full_system.hh" 64#include "sim/insttracer.hh" | 1/* 2 * Copyright (c) 2011-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 48 unchanged lines hidden (view full) --- 57#include "arch/interrupts.hh" 58#include "arch/isa_traits.hh" 59#include "arch/microcode_rom.hh" 60#include "base/statistics.hh" 61#include "mem/mem_object.hh" 62#include "sim/eventq.hh" 63#include "sim/full_system.hh" 64#include "sim/insttracer.hh" |
65#include "sim/probe/pmu.hh" |
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65#include "sim/system.hh" 66 67struct BaseCPUParams; 68class CheckerCPU; 69class ThreadContext; 70 71class CPUProgressEvent : public Event 72{ --- 202 unchanged lines hidden (view full) --- 275 { return reinterpret_cast<const Params *>(_params); } 276 BaseCPU(Params *params, bool is_checker = false); 277 virtual ~BaseCPU(); 278 279 virtual void init(); 280 virtual void startup(); 281 virtual void regStats(); 282 | 66#include "sim/system.hh" 67 68struct BaseCPUParams; 69class CheckerCPU; 70class ThreadContext; 71 72class CPUProgressEvent : public Event 73{ --- 202 unchanged lines hidden (view full) --- 276 { return reinterpret_cast<const Params *>(_params); } 277 BaseCPU(Params *params, bool is_checker = false); 278 virtual ~BaseCPU(); 279 280 virtual void init(); 281 virtual void startup(); 282 virtual void regStats(); 283 |
284 void regProbePoints() M5_ATTR_OVERRIDE; 285 |
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283 void registerThreadContexts(); 284 285 /** 286 * Prepare for another CPU to take over execution. 287 * 288 * When this method exits, all internal state should have been 289 * flushed. After the method returns, the simulator calls 290 * takeOverFrom() on the new CPU with this CPU as its parameter. --- 141 unchanged lines hidden (view full) --- 432 * loads rather than ticks. 433 * 434 * @param tid Thread monitor. 435 * @param loads Number of load instructions into the future. 436 * @param cause Cause to signal in the exit event. 437 */ 438 void scheduleLoadStop(ThreadID tid, Counter loads, const char *cause); 439 | 286 void registerThreadContexts(); 287 288 /** 289 * Prepare for another CPU to take over execution. 290 * 291 * When this method exits, all internal state should have been 292 * flushed. After the method returns, the simulator calls 293 * takeOverFrom() on the new CPU with this CPU as its parameter. --- 141 unchanged lines hidden (view full) --- 435 * loads rather than ticks. 436 * 437 * @param tid Thread monitor. 438 * @param loads Number of load instructions into the future. 439 * @param cause Cause to signal in the exit event. 440 */ 441 void scheduleLoadStop(ThreadID tid, Counter loads, const char *cause); 442 |
443 public: 444 /** 445 * @{ 446 * @name PMU Probe points. 447 */ 448 449 /** 450 * Helper method to trigger PMU probes for a committed 451 * instruction. 452 * 453 * @param inst Instruction that just committed 454 */ 455 virtual void probeInstCommit(const StaticInstPtr &inst); 456 457 /** 458 * Helper method to instantiate probe points belonging to this 459 * object. 460 * 461 * @param name Name of the probe point. 462 * @return A unique_ptr to the new probe point. 463 */ 464 ProbePoints::PMUUPtr pmuProbePoint(const char *name); 465 466 /** CPU cycle counter */ 467 ProbePoints::PMUUPtr ppCycles; 468 469 /** 470 * Instruction commit probe point. 471 * 472 * This probe point is triggered whenever one or more instructions 473 * are committed. It is normally triggered once for every 474 * instruction. However, CPU models committing bundles of 475 * instructions may call notify once for the entire bundle. 476 */ 477 ProbePoints::PMUUPtr ppRetiredInsts; 478 479 /** Retired load instructions */ 480 ProbePoints::PMUUPtr ppRetiredLoads; 481 /** Retired store instructions */ 482 ProbePoints::PMUUPtr ppRetiredStores; 483 484 /** Retired branches (any type) */ 485 ProbePoints::PMUUPtr ppRetiredBranches; 486 487 /** @} */ 488 489 490 |
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440 // Function tracing 441 private: 442 bool functionTracingEnabled; 443 std::ostream *functionTraceStream; 444 Addr currentFunctionStart; 445 Addr currentFunctionEnd; 446 Tick functionEntryTick; 447 void enableFunctionTrace(); --- 45 unchanged lines hidden --- | 491 // Function tracing 492 private: 493 bool functionTracingEnabled; 494 std::ostream *functionTraceStream; 495 Addr currentFunctionStart; 496 Addr currentFunctionEnd; 497 Tick functionEntryTick; 498 void enableFunctionTrace(); --- 45 unchanged lines hidden --- |