1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 26 unchanged lines hidden (view full) --- 35#include <vector> 36 37#include "base/statistics.hh" 38#include "config/full_system.hh" 39#include "sim/eventq.hh" 40#include "mem/mem_object.hh" 41#include "arch/isa_traits.hh" 42 |
43#if FULL_SYSTEM 44#include "arch/interrupts.hh" 45#endif 46 |
47class BranchPred; 48class CheckerCPU; 49class ThreadContext; 50class System; 51class Port; 52 53class CPUProgressEvent : public Event 54{ --- 17 unchanged lines hidden (view full) --- 72 Tick clock; 73 74 public: 75// Tick currentTick; 76 inline Tick frequency() const { return Clock::Frequency / clock; } 77 inline Tick cycles(int numCycles) const { return clock * numCycles; } 78 inline Tick curCycle() const { return curTick / clock; } 79 |
80#if FULL_SYSTEM 81 protected: |
82// uint64_t interrupts[TheISA::NumInterruptLevels]; 83// uint64_t intstatus; 84 TheISA::Interrupts interrupts; |
85 86 public: 87 virtual void post_interrupt(int int_num, int index); 88 virtual void clear_interrupt(int int_num, int index); 89 virtual void clear_interrupts(); 90 bool checkInterrupts; 91 92 bool check_interrupt(int int_num) const { |
93 return interrupts.check_interrupt(int_num); |
94 } 95 |
96 bool check_interrupts() const { return interrupts.check_interrupts(); } 97 //uint64_t intr_status() const { return interrupts.intr_status(); } |
98 99 class ProfileEvent : public Event 100 { 101 private: 102 BaseCPU *cpu; 103 int interval; 104 105 public: --- 155 unchanged lines hidden --- |