1/*
2 * Copyright (c) 2011 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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58#include "sim/full_system.hh"
59#include "sim/insttracer.hh"
60
61class BaseCPUParams;
62class BranchPred;
63class CheckerCPU;
64class ThreadContext;
65class System;
66class Port;
67
68namespace TheISA
69{
70 class Predecoder;
71}
72
73class CPUProgressEvent : public Event
74{

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142
143 void recvFunctional(PacketPtr pkt);
144
145 void recvRangeChange();
146
147 };
148
149 public:
150 /** Reads this CPU's ID. */
151 int cpuId() { return _cpuId; }
152
153 /** Reads this CPU's unique data requestor ID */
154 MasterID dataMasterId() { return _dataMasterId; }
155 /** Reads this CPU's unique instruction requestor ID */
156 MasterID instMasterId() { return _instMasterId; }
157
158// Tick currentTick;
159 inline Tick frequency() const { return SimClock::Frequency / clock; }
160 inline Tick ticks(int numCycles) const { return clock * numCycles; }
161 inline Tick curCycle() const { return curTick() / clock; }
162 inline Tick tickToCycles(Tick val) const { return val / clock; }
163 inline void workItemBegin() { numWorkItemsStarted++; }
164 inline void workItemEnd() { numWorkItemsCompleted++; }
165 // @todo remove me after debugging with legion done

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