FuncUnit.py (13168:4965381c122d) | FuncUnit.py (13169:eb3b2bea4231) |
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1# Copyright (c) 2010,2018 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 36 unchanged lines hidden (view full) --- 45 vals = ['No_OpClass', 'IntAlu', 'IntMult', 'IntDiv', 'FloatAdd', 46 'FloatCmp', 'FloatCvt', 'FloatMult', 'FloatMultAcc', 'FloatDiv', 47 'FloatMisc', 'FloatSqrt', 48 'SimdAdd', 'SimdAddAcc', 'SimdAlu', 'SimdCmp', 'SimdCvt', 49 'SimdMisc', 'SimdMult', 'SimdMultAcc', 'SimdShift', 'SimdShiftAcc', 50 'SimdSqrt', 'SimdFloatAdd', 'SimdFloatAlu', 'SimdFloatCmp', 51 'SimdFloatCvt', 'SimdFloatDiv', 'SimdFloatMisc', 'SimdFloatMult', 52 'SimdFloatMultAcc', 'SimdFloatSqrt', | 1# Copyright (c) 2010,2018 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 36 unchanged lines hidden (view full) --- 45 vals = ['No_OpClass', 'IntAlu', 'IntMult', 'IntDiv', 'FloatAdd', 46 'FloatCmp', 'FloatCvt', 'FloatMult', 'FloatMultAcc', 'FloatDiv', 47 'FloatMisc', 'FloatSqrt', 48 'SimdAdd', 'SimdAddAcc', 'SimdAlu', 'SimdCmp', 'SimdCvt', 49 'SimdMisc', 'SimdMult', 'SimdMultAcc', 'SimdShift', 'SimdShiftAcc', 50 'SimdSqrt', 'SimdFloatAdd', 'SimdFloatAlu', 'SimdFloatCmp', 51 'SimdFloatCvt', 'SimdFloatDiv', 'SimdFloatMisc', 'SimdFloatMult', 52 'SimdFloatMultAcc', 'SimdFloatSqrt', |
53 'SimdSha1Hash', 'SimdSha1Hash2', 'SimdSha256Hash', 54 'SimdSha256Hash2', 'SimdShaSigma2', 'SimdShaSigma3', 55 'MemRead', 'MemWrite', 'FloatMemRead', 'FloatMemWrite', | 53 'SimdAes', 'SimdAesMix', 'SimdSha1Hash', 'SimdSha1Hash2', 54 'SimdSha256Hash', 'SimdSha256Hash2', 'SimdShaSigma2', 55 'SimdShaSigma3', 'MemRead', 'MemWrite', 56 'FloatMemRead', 'FloatMemWrite', |
56 'IprAccess', 'InstPrefetch'] 57 58class OpDesc(SimObject): 59 type = 'OpDesc' 60 cxx_header = "cpu/func_unit.hh" 61 opClass = Param.OpClass("type of operation") 62 opLat = Param.Cycles(1, "cycles until result is available") 63 pipelined = Param.Bool(True, "set to true when the functional unit for" 64 "this op is fully pipelined. False means not pipelined at all.") 65 66class FUDesc(SimObject): 67 type = 'FUDesc' 68 cxx_header = "cpu/func_unit.hh" 69 count = Param.Int("number of these FU's available") 70 opList = VectorParam.OpDesc("operation classes for this FU type") | 57 'IprAccess', 'InstPrefetch'] 58 59class OpDesc(SimObject): 60 type = 'OpDesc' 61 cxx_header = "cpu/func_unit.hh" 62 opClass = Param.OpClass("type of operation") 63 opLat = Param.Cycles(1, "cycles until result is available") 64 pipelined = Param.Bool(True, "set to true when the functional unit for" 65 "this op is fully pipelined. False means not pipelined at all.") 66 67class FUDesc(SimObject): 68 type = 'FUDesc' 69 cxx_header = "cpu/func_unit.hh" 70 count = Param.Int("number of these FU's available") 71 opList = VectorParam.OpDesc("operation classes for this FU type") |