specialize.isa (8250:de679a068dd8) specialize.isa (12104:edd63f9c6184)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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138 #Figure out what to do with fixed register operands
139 #This is the index to use, so we should stick it some place.
140 if opType.reg in ("A", "B", "C", "D"):
141 regString = "INTREG_R%sX" % opType.reg
142 else:
143 regString = "INTREG_R%s" % opType.reg
144 env.addReg(regString)
145 env.addToDisassembly(
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 129 unchanged lines hidden (view full) ---

138 #Figure out what to do with fixed register operands
139 #This is the index to use, so we should stick it some place.
140 if opType.reg in ("A", "B", "C", "D"):
141 regString = "INTREG_R%sX" % opType.reg
142 else:
143 regString = "INTREG_R%s" % opType.reg
144 env.addReg(regString)
145 env.addToDisassembly(
146 "printReg(out, %s, regSize);\n" % regString)
146 "printReg(out, InstRegIndex(%s), regSize);\n" %
147 regString)
148
147 Name += "_R"
149 Name += "_R"
150
148 elif opType.tag == "B":
149 # This refers to registers whose index is encoded as part of the opcode
150 env.addToDisassembly(
151 elif opType.tag == "B":
152 # This refers to registers whose index is encoded as part of the opcode
153 env.addToDisassembly(
151 "printReg(out, %s, regSize);\n" % InstRegIndex)
154 "printReg(out, InstRegIndex(%s), regSize);\n" %
155 InstRegIndex)
156
152 Name += "_R"
157 Name += "_R"
158
153 env.addReg(InstRegIndex)
154 elif opType.tag == "M":
155 # This refers to memory. The macroop constructor sets up modrm
156 # addressing. Non memory modrm settings should cause an error.
157 env.doModRM = True
158 return doSplitDecode("MODRM_MOD",
159 {"3" : (doBadInstDecode,) },
160 (doRipRelativeDecode, Name, opTypes, env))

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177 env.addReg(ModRMRegIndex)
178 env.addToDisassembly(
179 "printSegment(out, %s);\n" % ModRMRegIndex)
180 Name += "_S"
181 elif opType.tag in ("G", "P", "T", "V"):
182 # Use the "reg" field of the ModRM byte to select the register
183 env.addReg(ModRMRegIndex)
184 env.addToDisassembly(
159 env.addReg(InstRegIndex)
160 elif opType.tag == "M":
161 # This refers to memory. The macroop constructor sets up modrm
162 # addressing. Non memory modrm settings should cause an error.
163 env.doModRM = True
164 return doSplitDecode("MODRM_MOD",
165 {"3" : (doBadInstDecode,) },
166 (doRipRelativeDecode, Name, opTypes, env))

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183 env.addReg(ModRMRegIndex)
184 env.addToDisassembly(
185 "printSegment(out, %s);\n" % ModRMRegIndex)
186 Name += "_S"
187 elif opType.tag in ("G", "P", "T", "V"):
188 # Use the "reg" field of the ModRM byte to select the register
189 env.addReg(ModRMRegIndex)
190 env.addToDisassembly(
185 "printReg(out, %s, regSize);\n" % ModRMRegIndex)
191 "printReg(out, InstRegIndex(%s), regSize);\n" %
192 ModRMRegIndex)
193
186 if opType.tag == "P":
194 if opType.tag == "P":
195
187 Name += "_MMX"
188 elif opType.tag == "V":
189 Name += "_XMM"
190 else:
191 Name += "_R"
192 elif opType.tag in ("E", "Q", "W"):
193 # This might refer to memory or to a register. We need to
194 # divide it up farther.
195 regEnv = copy.copy(env)
196 regEnv.addReg(ModRMRMIndex)
197 regEnv.addToDisassembly(
196 Name += "_MMX"
197 elif opType.tag == "V":
198 Name += "_XMM"
199 else:
200 Name += "_R"
201 elif opType.tag in ("E", "Q", "W"):
202 # This might refer to memory or to a register. We need to
203 # divide it up farther.
204 regEnv = copy.copy(env)
205 regEnv.addReg(ModRMRMIndex)
206 regEnv.addToDisassembly(
198 "printReg(out, %s, regSize);\n" % ModRMRMIndex)
207 "printReg(out, InstRegIndex(%s), regSize);\n" %
208 ModRMRMIndex)
209
199 # This refers to memory. The macroop constructor should set up
210 # This refers to memory. The macroop constructor should set up
211
200 # modrm addressing.
201 memEnv = copy.copy(env)
202 memEnv.doModRM = True
203 regSuffix = "_R"
204 if opType.tag == "Q":
205 regSuffix = "_MMX"
206 elif opType.tag == "W":
207 regSuffix = "_XMM"

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217 Name += "_I"
218 elif opType.tag == "O":
219 # Immediate containing a memory offset
220 Name += "_MI"
221 elif opType.tag in ("PR", "R", "VR"):
222 # Non register modrm settings should cause an error
223 env.addReg(ModRMRMIndex)
224 env.addToDisassembly(
212 # modrm addressing.
213 memEnv = copy.copy(env)
214 memEnv.doModRM = True
215 regSuffix = "_R"
216 if opType.tag == "Q":
217 regSuffix = "_MMX"
218 elif opType.tag == "W":
219 regSuffix = "_XMM"

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229 Name += "_I"
230 elif opType.tag == "O":
231 # Immediate containing a memory offset
232 Name += "_MI"
233 elif opType.tag in ("PR", "R", "VR"):
234 # Non register modrm settings should cause an error
235 env.addReg(ModRMRMIndex)
236 env.addToDisassembly(
225 "printReg(out, %s, regSize);\n" % ModRMRMIndex)
237 "printReg(out, InstRegIndex(%s), regSize);\n" %
238 ModRMRMIndex)
239
226 if opType.tag == "PR":
240 if opType.tag == "PR":
241
227 Name += "_MMX"
228 elif opType.tag == "VR":
229 Name += "_XMM"
230 else:
231 Name += "_R"
232 elif opType.tag in ("X", "Y"):
233 # This type of memory addressing is for string instructions.
234 # They'll use the right index and segment internally.

--- 18 unchanged lines hidden --- 		242 Name += "_MMX"
243 elif opType.tag == "VR":
244 Name += "_XMM"
245 else:
246 Name += "_R"
247 elif opType.tag in ("X", "Y"):
248 # This type of memory addressing is for string instructions.
249 # They'll use the right index and segment internally.

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