microasm.isa (5936:c30088a243ad) microasm.isa (6345:f9ae7c3a036c)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:

--- 61 unchanged lines hidden (view full) ---

70let {{
71 import sys
72 sys.path[0:0] = ["src/arch/x86/isa/"]
73 from insts import microcode
74 # print microcode
75 from micro_asm import MicroAssembler, Rom_Macroop
76 mainRom = X86MicrocodeRom('main ROM')
77 assembler = MicroAssembler(X86Macroop, microopClasses, mainRom, Rom_Macroop)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:

--- 61 unchanged lines hidden (view full) ---

70let {{
71 import sys
72 sys.path[0:0] = ["src/arch/x86/isa/"]
73 from insts import microcode
74 # print microcode
75 from micro_asm import MicroAssembler, Rom_Macroop
76 mainRom = X86MicrocodeRom('main ROM')
77 assembler = MicroAssembler(X86Macroop, microopClasses, mainRom, Rom_Macroop)
78
79 def regIdx(idx):
80 return "InstRegIndex(%s)" % idx
81
82 assembler.symbols["regIdx"] = regIdx
83
78 # Add in symbols for the microcode registers
79 for num in range(16):
84 # Add in symbols for the microcode registers
85 for num in range(16):
80 assembler.symbols["t%d" % num] = "NUM_INTREGS+%d" % num
86 assembler.symbols["t%d" % num] = regIdx("NUM_INTREGS+%d" % num)
81 for num in range(8):
87 for num in range(8):
82 assembler.symbols["ufp%d" % num] = "FLOATREG_MICROFP(%d)" % num
88 assembler.symbols["ufp%d" % num] = \
89 regIdx("FLOATREG_MICROFP(%d)" % num)
83 # Add in symbols for the segment descriptor registers
84 for letter in ("C", "D", "E", "F", "G", "H", "S"):
90 # Add in symbols for the segment descriptor registers
91 for letter in ("C", "D", "E", "F", "G", "H", "S"):
85 assembler.symbols["%ss" % letter.lower()] = "SEGMENT_REG_%sS" % letter
92 assembler.symbols["%ss" % letter.lower()] = \
93 regIdx("SEGMENT_REG_%sS" % letter)
86
87 # Add in symbols for the various checks of segment selectors.
88 for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck",
89 "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck",
90 "TRCheck", "TSSCheck", "InGDTCheck", "LDTCheck"):
91 assembler.symbols[check] = "Seg%s" % check
92
93 for reg in ("TR", "IDTR"):
94
95 # Add in symbols for the various checks of segment selectors.
96 for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck",
97 "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck",
98 "TRCheck", "TSSCheck", "InGDTCheck", "LDTCheck"):
99 assembler.symbols[check] = "Seg%s" % check
100
101 for reg in ("TR", "IDTR"):
94 assembler.symbols[reg.lower()] = "SYS_SEGMENT_REG_%s" % reg
102 assembler.symbols[reg.lower()] = regIdx("SYS_SEGMENT_REG_%s" % reg)
95
96 for reg in ("TSL", "TSG"):
103
104 for reg in ("TSL", "TSG"):
97 assembler.symbols[reg.lower()] = "SEGMENT_REG_%s" % reg
105 assembler.symbols[reg.lower()] = regIdx("SEGMENT_REG_%s" % reg)
98
99 # Miscellaneous symbols
100 symbols = {
106
107 # Miscellaneous symbols
108 symbols = {
101 "reg" : "env.reg",
102 "xmml" : "FLOATREG_XMM_LOW(env.reg)",
103 "xmmh" : "FLOATREG_XMM_HIGH(env.reg)",
104 "regm" : "env.regm",
105 "xmmlm" : "FLOATREG_XMM_LOW(env.regm)",
106 "xmmhm" : "FLOATREG_XMM_HIGH(env.regm)",
109 "reg" : regIdx("env.reg"),
110 "xmml" : regIdx("FLOATREG_XMM_LOW(env.reg)"),
111 "xmmh" : regIdx("FLOATREG_XMM_HIGH(env.reg)"),
112 "regm" : regIdx("env.regm"),
113 "xmmlm" : regIdx("FLOATREG_XMM_LOW(env.regm)"),
114 "xmmhm" : regIdx("FLOATREG_XMM_HIGH(env.regm)"),
107 "imm" : "adjustedImm",
108 "disp" : "adjustedDisp",
115 "imm" : "adjustedImm",
116 "disp" : "adjustedDisp",
109 "seg" : "env.seg",
117 "seg" : regIdx("env.seg"),
110 "scale" : "env.scale",
118 "scale" : "env.scale",
111 "index" : "env.index",
112 "base" : "env.base",
119 "index" : regIdx("env.index"),
120 "base" : regIdx("env.base"),
113 "dsz" : "env.dataSize",
114 "asz" : "env.addressSize",
115 "ssz" : "env.stackSize"
116 }
117 assembler.symbols.update(symbols)
118
119 assembler.symbols["ldsz"] = \
120 "((env.dataSize == 8) ? 3 : (env.dataSize == 4) ? 2 : 1)"

--- 7 unchanged lines hidden (view full) ---

128 # Short hand for common scale-index-base combinations.
129 assembler.symbols["sib"] = \
130 [symbols["scale"], symbols["index"], symbols["base"]]
131 assembler.symbols["riprel"] = \
132 ["1", assembler.symbols["t0"], assembler.symbols["t7"]]
133
134 # This segment selects an internal address space mapped to MSRs,
135 # CPUID info, etc.
121 "dsz" : "env.dataSize",
122 "asz" : "env.addressSize",
123 "ssz" : "env.stackSize"
124 }
125 assembler.symbols.update(symbols)
126
127 assembler.symbols["ldsz"] = \
128 "((env.dataSize == 8) ? 3 : (env.dataSize == 4) ? 2 : 1)"

--- 7 unchanged lines hidden (view full) ---

136 # Short hand for common scale-index-base combinations.
137 assembler.symbols["sib"] = \
138 [symbols["scale"], symbols["index"], symbols["base"]]
139 assembler.symbols["riprel"] = \
140 ["1", assembler.symbols["t0"], assembler.symbols["t7"]]
141
142 # This segment selects an internal address space mapped to MSRs,
143 # CPUID info, etc.
136 assembler.symbols["intseg"] = "SEGMENT_REG_MS"
144 assembler.symbols["intseg"] = regIdx("SEGMENT_REG_MS")
137 # This segment always has base 0, and doesn't imply any special handling
138 # like the internal segment above
145 # This segment always has base 0, and doesn't imply any special handling
146 # like the internal segment above
139 assembler.symbols["flatseg"] = "SEGMENT_REG_LS"
147 assembler.symbols["flatseg"] = regIdx("SEGMENT_REG_LS")
140
141 for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di', \
142 '8', '9', '10', '11', '12', '13', '14', '15'):
148
149 for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di', \
150 '8', '9', '10', '11', '12', '13', '14', '15'):
143 assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper()
151 assembler.symbols["r%s" % reg] = \
152 regIdx("INTREG_R%s" % reg.upper())
144
145 for reg in range(16):
153
154 for reg in range(16):
146 assembler.symbols["cr%d" % reg] = "MISCREG_CR%d" % reg
155 assembler.symbols["cr%d" % reg] = regIdx("MISCREG_CR%d" % reg)
147
148 for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF', \
149 'TF', 'IF', 'NT', 'RF', 'VM', 'AC', 'VIF', 'VIP', 'ID'):
150 assembler.symbols[flag] = flag + "Bit"
151
152 for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF',
153 'MSTRZ', 'STRZ', 'MSTRC',
154 'OF', 'CF', 'ZF', 'CvZF',

--- 4 unchanged lines hidden (view full) ---

159 assembler.symbols["CSTRnZnEZF"] = "ConditionTests::STRnZnEZF"
160
161 assembler.symbols["CTrue"] = "ConditionTests::True"
162 assembler.symbols["CFalse"] = "ConditionTests::False"
163
164 for reg in ('sysenter_cs', 'sysenter_esp', 'sysenter_eip',
165 'star', 'lstar', 'cstar', 'sf_mask',
166 'kernel_gs_base'):
156
157 for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF', \
158 'TF', 'IF', 'NT', 'RF', 'VM', 'AC', 'VIF', 'VIP', 'ID'):
159 assembler.symbols[flag] = flag + "Bit"
160
161 for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF',
162 'MSTRZ', 'STRZ', 'MSTRC',
163 'OF', 'CF', 'ZF', 'CvZF',

--- 4 unchanged lines hidden (view full) ---

168 assembler.symbols["CSTRnZnEZF"] = "ConditionTests::STRnZnEZF"
169
170 assembler.symbols["CTrue"] = "ConditionTests::True"
171 assembler.symbols["CFalse"] = "ConditionTests::False"
172
173 for reg in ('sysenter_cs', 'sysenter_esp', 'sysenter_eip',
174 'star', 'lstar', 'cstar', 'sf_mask',
175 'kernel_gs_base'):
167 assembler.symbols[reg] = "MISCREG_%s" % reg.upper()
176 assembler.symbols[reg] = regIdx("MISCREG_%s" % reg.upper())
168
169 # Code literal which forces a default 64 bit operand size in 64 bit mode.
170 assembler.symbols["oszIn64Override"] = '''
171 if (machInst.mode.submode == SixtyFourBitMode &&
172 env.dataSize == 4)
173 env.dataSize = 8;
174 '''
175

--- 20 unchanged lines hidden (view full) ---

196 assembler.symbols["rom_label"] = rom_labeler
197
198 def rom_local_labeler(labelStr):
199 return "romMicroPC(RomLabels::label_%s)" % labelStr
200
201 assembler.symbols["rom_local_label"] = rom_local_labeler
202
203 def stack_index(index):
177
178 # Code literal which forces a default 64 bit operand size in 64 bit mode.
179 assembler.symbols["oszIn64Override"] = '''
180 if (machInst.mode.submode == SixtyFourBitMode &&
181 env.dataSize == 4)
182 env.dataSize = 8;
183 '''
184

--- 20 unchanged lines hidden (view full) ---

205 assembler.symbols["rom_label"] = rom_labeler
206
207 def rom_local_labeler(labelStr):
208 return "romMicroPC(RomLabels::label_%s)" % labelStr
209
210 assembler.symbols["rom_local_label"] = rom_local_labeler
211
212 def stack_index(index):
204 return "(NUM_FLOATREGS + (((%s) + 8) %% 8))" % index
213 return regIdx("NUM_FLOATREGS + (((%s) + 8) %% 8)" % index)
205
206 assembler.symbols["st"] = stack_index
207
208 macroopDict = assembler.assemble(microcode)
209
210 decoder_output += mainRom.getDefinition()
211 header_output += mainRom.getDeclaration()
212}};
214
215 assembler.symbols["st"] = stack_index
216
217 macroopDict = assembler.assemble(microcode)
218
219 decoder_output += mainRom.getDefinition()
220 header_output += mainRom.getDeclaration()
221}};