microasm.isa (5900:6776001c9b92) microasm.isa (5906:fe94a5f1f229)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:

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133
134 # This segment selects an internal address space mapped to MSRs,
135 # CPUID info, etc.
136 assembler.symbols["intseg"] = "SEGMENT_REG_MS"
137 # This segment always has base 0, and doesn't imply any special handling
138 # like the internal segment above
139 assembler.symbols["flatseg"] = "SEGMENT_REG_LS"
140
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:

--- 124 unchanged lines hidden (view full) ---

133
134 # This segment selects an internal address space mapped to MSRs,
135 # CPUID info, etc.
136 assembler.symbols["intseg"] = "SEGMENT_REG_MS"
137 # This segment always has base 0, and doesn't imply any special handling
138 # like the internal segment above
139 assembler.symbols["flatseg"] = "SEGMENT_REG_LS"
140
141 for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di'):
141 for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di', \
142 '8', '9', '10', '11', '12', '13', '14', '15'):
142 assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper()
143
144 for reg in range(16):
145 assembler.symbols["cr%d" % reg] = "MISCREG_CR%d" % reg
146
147 for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF', \
148 'TF', 'IF', 'NT', 'RF', 'VM', 'AC', 'VIF', 'VIP', 'ID'):
149 assembler.symbols[flag] = flag + "Bit"

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143 assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper()
144
145 for reg in range(16):
146 assembler.symbols["cr%d" % reg] = "MISCREG_CR%d" % reg
147
148 for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF', \
149 'TF', 'IF', 'NT', 'RF', 'VM', 'AC', 'VIF', 'VIP', 'ID'):
150 assembler.symbols[flag] = flag + "Bit"

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