microasm.isa (5294:7222bdaed33b) microasm.isa (5326:7e4cef0e528b)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:

--- 93 unchanged lines hidden (view full) ---

102 "index" : "env.index",
103 "base" : "env.base",
104 "dsz" : "env.dataSize",
105 "asz" : "env.addressSize",
106 "ssz" : "env.stackSize"
107 }
108 assembler.symbols.update(symbols)
109
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:

--- 93 unchanged lines hidden (view full) ---

102 "index" : "env.index",
103 "base" : "env.base",
104 "dsz" : "env.dataSize",
105 "asz" : "env.addressSize",
106 "ssz" : "env.stackSize"
107 }
108 assembler.symbols.update(symbols)
109
110 assembler.symbols["ldsz"] = \
111 "((env.dataSize == 8) ? 3 : (env.dataSize == 4) ? 2 : 1)"
112
113 assembler.symbols["lasz"] = \
114 "((env.addressSize == 8) ? 3 : (env.addressSize == 4) ? 2 : 1)"
115
116 assembler.symbols["lssz"] = \
117 "((env.stackSize == 8) ? 3 : (env.stackSize == 4) ? 2 : 1)"
118
110 # Short hand for common scale-index-base combinations.
111 assembler.symbols["sib"] = \
112 [symbols["scale"], symbols["index"], symbols["base"]]
113 assembler.symbols["riprel"] = \
114 ["1", assembler.symbols["t0"], assembler.symbols["t7"]]
115
116 # This segment selects an internal address space mapped to MSRs,
117 # CPUID info, etc.

--- 57 unchanged lines hidden --- 		119 # Short hand for common scale-index-base combinations.
120 assembler.symbols["sib"] = \
121 [symbols["scale"], symbols["index"], symbols["base"]]
122 assembler.symbols["riprel"] = \
123 ["1", assembler.symbols["t0"], assembler.symbols["t7"]]
124
125 # This segment selects an internal address space mapped to MSRs,
126 # CPUID info, etc.

--- 57 unchanged lines hidden ---