microasm.isa (5241:a6602acdd046) microasm.isa (5291:5d38610cff05)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:

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75 # Add in symbols for the microcode registers
76 for num in range(15):
77 assembler.symbols["t%d" % num] = "NUM_INTREGS+%d" % num
78 for num in range(7):
79 assembler.symbols["ufp%d" % num] = "FLOATREG_MICROFP(%d)" % num
80 # Add in symbols for the segment descriptor registers
81 for letter in ("C", "D", "E", "F", "G", "S"):
82 assembler.symbols["%ss" % letter.lower()] = "SEGMENT_REG_%sS" % letter
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:

--- 66 unchanged lines hidden (view full) ---

75 # Add in symbols for the microcode registers
76 for num in range(15):
77 assembler.symbols["t%d" % num] = "NUM_INTREGS+%d" % num
78 for num in range(7):
79 assembler.symbols["ufp%d" % num] = "FLOATREG_MICROFP(%d)" % num
80 # Add in symbols for the segment descriptor registers
81 for letter in ("C", "D", "E", "F", "G", "S"):
82 assembler.symbols["%ss" % letter.lower()] = "SEGMENT_REG_%sS" % letter
83
84 for reg in ("LDTR", "TR", "GDTR", "IDTR"):
85 assembler.symbols[reg.lower()] = "SYS_SEGMENT_REG_%s" % reg
86
83 # Miscellaneous symbols
84 symbols = {
85 "reg" : "env.reg",
86 "xmml" : "FLOATREG_XMM_LOW(env.reg)",
87 "xmmh" : "FLOATREG_XMM_HIGH(env.reg)",
88 "regm" : "env.regm",
89 "xmmlm" : "FLOATREG_XMM_LOW(env.regm)",
90 "xmmhm" : "FLOATREG_XMM_HIGH(env.regm)",

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133
134 # Code literal which forces a default 64 bit operand size in 64 bit mode.
135 assembler.symbols["oszIn64Override"] = '''
136 if (machInst.mode.submode == SixtyFourBitMode &&
137 env.dataSize == 4)
138 env.dataSize = 8;
139 '''
140
87 # Miscellaneous symbols
88 symbols = {
89 "reg" : "env.reg",
90 "xmml" : "FLOATREG_XMM_LOW(env.reg)",
91 "xmmh" : "FLOATREG_XMM_HIGH(env.reg)",
92 "regm" : "env.regm",
93 "xmmlm" : "FLOATREG_XMM_LOW(env.regm)",
94 "xmmhm" : "FLOATREG_XMM_HIGH(env.regm)",

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137
138 # Code literal which forces a default 64 bit operand size in 64 bit mode.
139 assembler.symbols["oszIn64Override"] = '''
140 if (machInst.mode.submode == SixtyFourBitMode &&
141 env.dataSize == 4)
142 env.dataSize = 8;
143 '''
144
145 assembler.symbols["oszForPseudoDesc"] = '''
146 if (machInst.mode.submode == SixtyFourBitMode)
147 env.dataSize = 8;
148 else
149 env.dataSize = 4;
150 '''
151
141 def trimImm(width):
142 return "adjustedImm = adjustedImm & mask(%s);" % width
143
144 assembler.symbols["trimImm"] = trimImm
145
146 def labeler(labelStr):
147 return "label_%s" % labelStr
148
149 assembler.symbols["label"] = labeler
150
151 def stack_index(index):
152 return "(NUM_FLOATREGS + (((%s) + 8) %% 8))" % index
153
154 assembler.symbols["st"] = stack_index
155
156 macroopDict = assembler.assemble(microcode)
157}};
152 def trimImm(width):
153 return "adjustedImm = adjustedImm & mask(%s);" % width
154
155 assembler.symbols["trimImm"] = trimImm
156
157 def labeler(labelStr):
158 return "label_%s" % labelStr
159
160 assembler.symbols["label"] = labeler
161
162 def stack_index(index):
163 return "(NUM_FLOATREGS + (((%s) + 8) %% 8))" % index
164
165 assembler.symbols["st"] = stack_index
166
167 macroopDict = assembler.assemble(microcode)
168}};