microasm.isa (4679:0b39fa8f5eb8) microasm.isa (4686:6ee937c0c431)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:

--- 82 unchanged lines hidden (view full) ---

91 "osz" : "env.operandSize",
92 "ssz" : "env.stackSize"
93 }
94
95 for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di'):
96 assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper()
97 assembler.symbols.update(symbols)
98
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:

--- 82 unchanged lines hidden (view full) ---

91 "osz" : "env.operandSize",
92 "ssz" : "env.stackSize"
93 }
94
95 for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di'):
96 assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper()
97 assembler.symbols.update(symbols)
98
99 for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF'):
100 assembler.symbols[flag] = flag + "Bit"
101
102 for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF',
103 'MSTRZ', 'STRZ', 'MSTRC', 'STRZnZF',
104 'OF', 'CF', 'ZF', 'CvZF',
105 'SF', 'PF', 'SxOF', 'SxOvZF'):
106 assembler.symbols["C%s" % cond] = "ConditionTests::%s" % cond
107 assembler.symbols["nC%s" % cond] = "ConditionTests::Not%s" % cond
108
109 assembler.symbols["CTrue"] = "ConditionTests::True"
110 assembler.symbols["CFalse"] = "ConditionTests::False"
111
99 # Code literal which forces a default 64 bit operand size in 64 bit mode.
100 assembler.symbols["oszIn64Override"] = '''
101 if (machInst.mode.submode == SixtyFourBitMode &&
102 env.dataSize == 4)
103 env.dataSize = 8;
104 '''
105
106 macroopDict = assembler.assemble(microcode)
107}};
112 # Code literal which forces a default 64 bit operand size in 64 bit mode.
113 assembler.symbols["oszIn64Override"] = '''
114 if (machInst.mode.submode == SixtyFourBitMode &&
115 env.dataSize == 4)
116 env.dataSize = 8;
117 '''
118
119 macroopDict = assembler.assemble(microcode)
120}};