microasm.isa (4338:24d31b35bcf9) microasm.isa (4343:3f11bcf873b3)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:

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64let {{
65 # This builds either a regular or macro op to implement the sequence of
66 # ops we give it.
67 def genInst(name, Name, ops):
68 # If we can implement this instruction with exactly one microop, just
69 # use that directly.
70 newStmnt = ''
71 if len(ops) == 1:
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:

--- 55 unchanged lines hidden (view full) ---

64let {{
65 # This builds either a regular or macro op to implement the sequence of
66 # ops we give it.
67 def genInst(name, Name, ops):
68 # If we can implement this instruction with exactly one microop, just
69 # use that directly.
70 newStmnt = ''
71 if len(ops) == 1:
72 decode_block = "return (X86StaticInst *)(%s);" % \
72 decode_block = "return %s;" % \
73 ops[0].getAllocator()
74 return ('', '', decode_block, '')
75 else:
76 # Build a macroop to contain the sequence of microops we've
77 # been given.
78 return genMacroOp(name, Name, ops)
79}};
80

--- 277 unchanged lines hidden --- 		73 ops[0].getAllocator()
74 return ('', '', decode_block, '')
75 else:
76 # Build a macroop to contain the sequence of microops we've
77 # been given.
78 return genMacroOp(name, Name, ops)
79}};
80

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