1// -*- mode:c++ -*-
2
3// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:
9//
10// The software must be used only for Non-Commercial Use which means any
11// use which is NOT directed to receiving any direct monetary
12// compensation for, or commercial advantage from such use. Illustrative
13// examples of non-commercial use are academic research, personal study,
14// teaching, education and corporate research & development.
15// Illustrative examples of commercial use are distributing products for
16// commercial advantage and providing services using the software for
17// commercial advantage.
18//
19// If you wish to use this software or functionality therein that may be
20// covered by patents for commercial use, please contact:
21// Director of Intellectual Property Licensing
22// Office of Strategy and Technology
23// Hewlett-Packard Company
24// 1501 Page Mill Road
25// Palo Alto, California 94304
26//
27// Redistributions of source code must retain the above copyright notice,
28// this list of conditions and the following disclaimer. Redistributions
29// in binary form must reproduce the above copyright notice, this list of
30// conditions and the following disclaimer in the documentation and/or
31// other materials provided with the distribution. Neither the name of
32// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
33// contributors may be used to endorse or promote products derived from
34// this software without specific prior written permission. No right of
35// sublicense is granted herewith. Derivatives of the software and
36// output created using the software may be prepared, but only for
37// Non-Commercial Uses. Derivatives of the software may be shared with
38// others provided: (i) the others agree to abide by the list of
39// conditions herein which includes the Non-Commercial Use restrictions;
40// and (ii) such Derivatives of the software include the above copyright
41// notice to acknowledge the contribution from this software where
42// applicable, this list of conditions and the disclaimer below.
43//
44// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
45// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
46// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
47// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
48// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
49// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
50// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
51// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
52// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
53// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
54// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55//
56// Authors: Gabe Black
57
58//Include the definitions of the micro ops.
59//These are python representations of static insts which stand on their own
60//and make up an internal instruction set. They are used by the micro
61//assembler.
62##include "microops/microops.isa"
63
64//Include code to build macroops in both C++ and python.
65##include "macroop.isa"
66
67//Include code to fill out the microcode ROM in both C++ and python.
68##include "rom.isa"
69
70let {{
71 import sys
72 sys.path[0:0] = ["src/arch/x86/isa/"]
73 from insts import microcode
74 # print microcode
75 from micro_asm import MicroAssembler, Rom_Macroop
76 mainRom = X86MicrocodeRom('main ROM')
77 assembler = MicroAssembler(X86Macroop, microopClasses, mainRom, Rom_Macroop)
78
79 def regIdx(idx):
80 return "InstRegIndex(%s)" % idx
81
82 assembler.symbols["regIdx"] = regIdx
83
84 # Add in symbols for the microcode registers
85 for num in range(16):
86 assembler.symbols["t%d" % num] = regIdx("NUM_INTREGS+%d" % num)
87 for num in range(8):
88 assembler.symbols["ufp%d" % num] = \
89 regIdx("FLOATREG_MICROFP(%d)" % num)
90 # Add in symbols for the segment descriptor registers
91 for letter in ("C", "D", "E", "F", "G", "H", "S"):
92 assembler.symbols["%ss" % letter.lower()] = \
93 regIdx("SEGMENT_REG_%sS" % letter)
94
95 # Add in symbols for the various checks of segment selectors.
96 for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck",
97 "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck",
98 "TRCheck", "TSSCheck", "InGDTCheck", "LDTCheck"):
99 assembler.symbols[check] = "Seg%s" % check
100
101 for reg in ("TR", "IDTR"):
102 assembler.symbols[reg.lower()] = regIdx("SYS_SEGMENT_REG_%s" % reg)
103
104 for reg in ("TSL", "TSG"):
105 assembler.symbols[reg.lower()] = regIdx("SEGMENT_REG_%s" % reg)
106
107 # Miscellaneous symbols
108 symbols = {
109 "reg" : regIdx("env.reg"),
110 "xmml" : regIdx("FLOATREG_XMM_LOW(env.reg)"),
111 "xmmh" : regIdx("FLOATREG_XMM_HIGH(env.reg)"),
112 "regm" : regIdx("env.regm"),
113 "xmmlm" : regIdx("FLOATREG_XMM_LOW(env.regm)"),
114 "xmmhm" : regIdx("FLOATREG_XMM_HIGH(env.regm)"),
115 "mmx" : regIdx("FLOATREG_MMX(env.reg)"),
116 "mmxm" : regIdx("FLOATREG_MMX(env.regm)"),
117 "imm" : "adjustedImm",
118 "disp" : "adjustedDisp",
119 "seg" : regIdx("env.seg"),
120 "scale" : "env.scale",
121 "index" : regIdx("env.index"),
122 "base" : regIdx("env.base"),
123 "dsz" : "env.dataSize",
124 "asz" : "env.addressSize",
125 "ssz" : "env.stackSize"
126 }
127 assembler.symbols.update(symbols)
128
129 assembler.symbols["ldsz"] = \
130 "((env.dataSize == 8) ? 3 : (env.dataSize == 4) ? 2 : 1)"
131
132 assembler.symbols["lasz"] = \
133 "((env.addressSize == 8) ? 3 : (env.addressSize == 4) ? 2 : 1)"
134
135 assembler.symbols["lssz"] = \
136 "((env.stackSize == 8) ? 3 : (env.stackSize == 4) ? 2 : 1)"
137
138 # Short hand for common scale-index-base combinations.
139 assembler.symbols["sib"] = \
140 [symbols["scale"], symbols["index"], symbols["base"]]
141 assembler.symbols["riprel"] = \
142 ["1", assembler.symbols["t0"], assembler.symbols["t7"]]
143
144 # This segment selects an internal address space mapped to MSRs,
145 # CPUID info, etc.
146 assembler.symbols["intseg"] = regIdx("SEGMENT_REG_MS")
147 # This segment always has base 0, and doesn't imply any special handling
148 # like the internal segment above
149 assembler.symbols["flatseg"] = regIdx("SEGMENT_REG_LS")
150
151 for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di', \
152 '8', '9', '10', '11', '12', '13', '14', '15'):
153 assembler.symbols["r%s" % reg] = \
154 regIdx("INTREG_R%s" % reg.upper())
155
156 for reg in ('ah', 'bh', 'ch', 'dh'):
157 assembler.symbols[reg] = \
158 regIdx("INTREG_FOLDED(INTREG_%s, IntFoldBit)" % reg.upper())
159
160 for reg in range(16):
161 assembler.symbols["cr%d" % reg] = regIdx("MISCREG_CR%d" % reg)
162
163 for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF', \
164 'TF', 'IF', 'NT', 'RF', 'VM', 'AC', 'VIF', 'VIP', 'ID'):
165 assembler.symbols[flag] = flag + "Bit"
166
167 for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF',
168 'MSTRZ', 'STRZ', 'MSTRC',
169 'OF', 'CF', 'ZF', 'CvZF',
170 'SF', 'PF', 'SxOF', 'SxOvZF'):
171 assembler.symbols["C%s" % cond] = "ConditionTests::%s" % cond
172 assembler.symbols["nC%s" % cond] = "ConditionTests::Not%s" % cond
173 assembler.symbols["CSTRZnEZF"] = "ConditionTests::STRZnEZF"
174 assembler.symbols["CSTRnZnEZF"] = "ConditionTests::STRnZnEZF"
175
176 assembler.symbols["CTrue"] = "ConditionTests::True"
177 assembler.symbols["CFalse"] = "ConditionTests::False"
178
179 for reg in ('sysenter_cs', 'sysenter_esp', 'sysenter_eip',
180 'star', 'lstar', 'cstar', 'sf_mask',
181 'kernel_gs_base'):
182 assembler.symbols[reg] = regIdx("MISCREG_%s" % reg.upper())
183
| 1// -*- mode:c++ -*-
2
3// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:
9//
10// The software must be used only for Non-Commercial Use which means any
11// use which is NOT directed to receiving any direct monetary
12// compensation for, or commercial advantage from such use. Illustrative
13// examples of non-commercial use are academic research, personal study,
14// teaching, education and corporate research & development.
15// Illustrative examples of commercial use are distributing products for
16// commercial advantage and providing services using the software for
17// commercial advantage.
18//
19// If you wish to use this software or functionality therein that may be
20// covered by patents for commercial use, please contact:
21// Director of Intellectual Property Licensing
22// Office of Strategy and Technology
23// Hewlett-Packard Company
24// 1501 Page Mill Road
25// Palo Alto, California 94304
26//
27// Redistributions of source code must retain the above copyright notice,
28// this list of conditions and the following disclaimer. Redistributions
29// in binary form must reproduce the above copyright notice, this list of
30// conditions and the following disclaimer in the documentation and/or
31// other materials provided with the distribution. Neither the name of
32// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
33// contributors may be used to endorse or promote products derived from
34// this software without specific prior written permission. No right of
35// sublicense is granted herewith. Derivatives of the software and
36// output created using the software may be prepared, but only for
37// Non-Commercial Uses. Derivatives of the software may be shared with
38// others provided: (i) the others agree to abide by the list of
39// conditions herein which includes the Non-Commercial Use restrictions;
40// and (ii) such Derivatives of the software include the above copyright
41// notice to acknowledge the contribution from this software where
42// applicable, this list of conditions and the disclaimer below.
43//
44// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
45// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
46// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
47// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
48// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
49// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
50// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
51// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
52// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
53// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
54// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55//
56// Authors: Gabe Black
57
58//Include the definitions of the micro ops.
59//These are python representations of static insts which stand on their own
60//and make up an internal instruction set. They are used by the micro
61//assembler.
62##include "microops/microops.isa"
63
64//Include code to build macroops in both C++ and python.
65##include "macroop.isa"
66
67//Include code to fill out the microcode ROM in both C++ and python.
68##include "rom.isa"
69
70let {{
71 import sys
72 sys.path[0:0] = ["src/arch/x86/isa/"]
73 from insts import microcode
74 # print microcode
75 from micro_asm import MicroAssembler, Rom_Macroop
76 mainRom = X86MicrocodeRom('main ROM')
77 assembler = MicroAssembler(X86Macroop, microopClasses, mainRom, Rom_Macroop)
78
79 def regIdx(idx):
80 return "InstRegIndex(%s)" % idx
81
82 assembler.symbols["regIdx"] = regIdx
83
84 # Add in symbols for the microcode registers
85 for num in range(16):
86 assembler.symbols["t%d" % num] = regIdx("NUM_INTREGS+%d" % num)
87 for num in range(8):
88 assembler.symbols["ufp%d" % num] = \
89 regIdx("FLOATREG_MICROFP(%d)" % num)
90 # Add in symbols for the segment descriptor registers
91 for letter in ("C", "D", "E", "F", "G", "H", "S"):
92 assembler.symbols["%ss" % letter.lower()] = \
93 regIdx("SEGMENT_REG_%sS" % letter)
94
95 # Add in symbols for the various checks of segment selectors.
96 for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck",
97 "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck",
98 "TRCheck", "TSSCheck", "InGDTCheck", "LDTCheck"):
99 assembler.symbols[check] = "Seg%s" % check
100
101 for reg in ("TR", "IDTR"):
102 assembler.symbols[reg.lower()] = regIdx("SYS_SEGMENT_REG_%s" % reg)
103
104 for reg in ("TSL", "TSG"):
105 assembler.symbols[reg.lower()] = regIdx("SEGMENT_REG_%s" % reg)
106
107 # Miscellaneous symbols
108 symbols = {
109 "reg" : regIdx("env.reg"),
110 "xmml" : regIdx("FLOATREG_XMM_LOW(env.reg)"),
111 "xmmh" : regIdx("FLOATREG_XMM_HIGH(env.reg)"),
112 "regm" : regIdx("env.regm"),
113 "xmmlm" : regIdx("FLOATREG_XMM_LOW(env.regm)"),
114 "xmmhm" : regIdx("FLOATREG_XMM_HIGH(env.regm)"),
115 "mmx" : regIdx("FLOATREG_MMX(env.reg)"),
116 "mmxm" : regIdx("FLOATREG_MMX(env.regm)"),
117 "imm" : "adjustedImm",
118 "disp" : "adjustedDisp",
119 "seg" : regIdx("env.seg"),
120 "scale" : "env.scale",
121 "index" : regIdx("env.index"),
122 "base" : regIdx("env.base"),
123 "dsz" : "env.dataSize",
124 "asz" : "env.addressSize",
125 "ssz" : "env.stackSize"
126 }
127 assembler.symbols.update(symbols)
128
129 assembler.symbols["ldsz"] = \
130 "((env.dataSize == 8) ? 3 : (env.dataSize == 4) ? 2 : 1)"
131
132 assembler.symbols["lasz"] = \
133 "((env.addressSize == 8) ? 3 : (env.addressSize == 4) ? 2 : 1)"
134
135 assembler.symbols["lssz"] = \
136 "((env.stackSize == 8) ? 3 : (env.stackSize == 4) ? 2 : 1)"
137
138 # Short hand for common scale-index-base combinations.
139 assembler.symbols["sib"] = \
140 [symbols["scale"], symbols["index"], symbols["base"]]
141 assembler.symbols["riprel"] = \
142 ["1", assembler.symbols["t0"], assembler.symbols["t7"]]
143
144 # This segment selects an internal address space mapped to MSRs,
145 # CPUID info, etc.
146 assembler.symbols["intseg"] = regIdx("SEGMENT_REG_MS")
147 # This segment always has base 0, and doesn't imply any special handling
148 # like the internal segment above
149 assembler.symbols["flatseg"] = regIdx("SEGMENT_REG_LS")
150
151 for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di', \
152 '8', '9', '10', '11', '12', '13', '14', '15'):
153 assembler.symbols["r%s" % reg] = \
154 regIdx("INTREG_R%s" % reg.upper())
155
156 for reg in ('ah', 'bh', 'ch', 'dh'):
157 assembler.symbols[reg] = \
158 regIdx("INTREG_FOLDED(INTREG_%s, IntFoldBit)" % reg.upper())
159
160 for reg in range(16):
161 assembler.symbols["cr%d" % reg] = regIdx("MISCREG_CR%d" % reg)
162
163 for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF', \
164 'TF', 'IF', 'NT', 'RF', 'VM', 'AC', 'VIF', 'VIP', 'ID'):
165 assembler.symbols[flag] = flag + "Bit"
166
167 for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF',
168 'MSTRZ', 'STRZ', 'MSTRC',
169 'OF', 'CF', 'ZF', 'CvZF',
170 'SF', 'PF', 'SxOF', 'SxOvZF'):
171 assembler.symbols["C%s" % cond] = "ConditionTests::%s" % cond
172 assembler.symbols["nC%s" % cond] = "ConditionTests::Not%s" % cond
173 assembler.symbols["CSTRZnEZF"] = "ConditionTests::STRZnEZF"
174 assembler.symbols["CSTRnZnEZF"] = "ConditionTests::STRnZnEZF"
175
176 assembler.symbols["CTrue"] = "ConditionTests::True"
177 assembler.symbols["CFalse"] = "ConditionTests::False"
178
179 for reg in ('sysenter_cs', 'sysenter_esp', 'sysenter_eip',
180 'star', 'lstar', 'cstar', 'sf_mask',
181 'kernel_gs_base'):
182 assembler.symbols[reg] = regIdx("MISCREG_%s" % reg.upper())
183
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