microasm.isa (5241:a6602acdd046) microasm.isa (5291:5d38610cff05)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:
9//
10// The software must be used only for Non-Commercial Use which means any
11// use which is NOT directed to receiving any direct monetary
12// compensation for, or commercial advantage from such use. Illustrative
13// examples of non-commercial use are academic research, personal study,
14// teaching, education and corporate research & development.
15// Illustrative examples of commercial use are distributing products for
16// commercial advantage and providing services using the software for
17// commercial advantage.
18//
19// If you wish to use this software or functionality therein that may be
20// covered by patents for commercial use, please contact:
21// Director of Intellectual Property Licensing
22// Office of Strategy and Technology
23// Hewlett-Packard Company
24// 1501 Page Mill Road
25// Palo Alto, California 94304
26//
27// Redistributions of source code must retain the above copyright notice,
28// this list of conditions and the following disclaimer. Redistributions
29// in binary form must reproduce the above copyright notice, this list of
30// conditions and the following disclaimer in the documentation and/or
31// other materials provided with the distribution. Neither the name of
32// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
33// contributors may be used to endorse or promote products derived from
34// this software without specific prior written permission. No right of
35// sublicense is granted herewith. Derivatives of the software and
36// output created using the software may be prepared, but only for
37// Non-Commercial Uses. Derivatives of the software may be shared with
38// others provided: (i) the others agree to abide by the list of
39// conditions herein which includes the Non-Commercial Use restrictions;
40// and (ii) such Derivatives of the software include the above copyright
41// notice to acknowledge the contribution from this software where
42// applicable, this list of conditions and the disclaimer below.
43//
44// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
45// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
46// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
47// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
48// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
49// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
50// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
51// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
52// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
53// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
54// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55//
56// Authors: Gabe Black
57
58//Include the definitions of the micro ops.
59//These are python representations of static insts which stand on their own
60//and make up an internal instruction set. They are used by the micro
61//assembler.
62##include "microops/microops.isa"
63
64//Include code to build macroops in both C++ and python.
65##include "macroop.isa"
66
67let {{
68 import sys
69 sys.path[0:0] = ["src/arch/x86/isa/"]
70 from insts import microcode
71 # print microcode
72 from micro_asm import MicroAssembler, Rom_Macroop, Rom
73 mainRom = Rom('main ROM')
74 assembler = MicroAssembler(X86Macroop, microopClasses, mainRom, Rom_Macroop)
75 # Add in symbols for the microcode registers
76 for num in range(15):
77 assembler.symbols["t%d" % num] = "NUM_INTREGS+%d" % num
78 for num in range(7):
79 assembler.symbols["ufp%d" % num] = "FLOATREG_MICROFP(%d)" % num
80 # Add in symbols for the segment descriptor registers
81 for letter in ("C", "D", "E", "F", "G", "S"):
82 assembler.symbols["%ss" % letter.lower()] = "SEGMENT_REG_%sS" % letter
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:
9//
10// The software must be used only for Non-Commercial Use which means any
11// use which is NOT directed to receiving any direct monetary
12// compensation for, or commercial advantage from such use. Illustrative
13// examples of non-commercial use are academic research, personal study,
14// teaching, education and corporate research & development.
15// Illustrative examples of commercial use are distributing products for
16// commercial advantage and providing services using the software for
17// commercial advantage.
18//
19// If you wish to use this software or functionality therein that may be
20// covered by patents for commercial use, please contact:
21// Director of Intellectual Property Licensing
22// Office of Strategy and Technology
23// Hewlett-Packard Company
24// 1501 Page Mill Road
25// Palo Alto, California 94304
26//
27// Redistributions of source code must retain the above copyright notice,
28// this list of conditions and the following disclaimer. Redistributions
29// in binary form must reproduce the above copyright notice, this list of
30// conditions and the following disclaimer in the documentation and/or
31// other materials provided with the distribution. Neither the name of
32// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
33// contributors may be used to endorse or promote products derived from
34// this software without specific prior written permission. No right of
35// sublicense is granted herewith. Derivatives of the software and
36// output created using the software may be prepared, but only for
37// Non-Commercial Uses. Derivatives of the software may be shared with
38// others provided: (i) the others agree to abide by the list of
39// conditions herein which includes the Non-Commercial Use restrictions;
40// and (ii) such Derivatives of the software include the above copyright
41// notice to acknowledge the contribution from this software where
42// applicable, this list of conditions and the disclaimer below.
43//
44// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
45// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
46// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
47// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
48// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
49// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
50// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
51// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
52// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
53// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
54// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55//
56// Authors: Gabe Black
57
58//Include the definitions of the micro ops.
59//These are python representations of static insts which stand on their own
60//and make up an internal instruction set. They are used by the micro
61//assembler.
62##include "microops/microops.isa"
63
64//Include code to build macroops in both C++ and python.
65##include "macroop.isa"
66
67let {{
68 import sys
69 sys.path[0:0] = ["src/arch/x86/isa/"]
70 from insts import microcode
71 # print microcode
72 from micro_asm import MicroAssembler, Rom_Macroop, Rom
73 mainRom = Rom('main ROM')
74 assembler = MicroAssembler(X86Macroop, microopClasses, mainRom, Rom_Macroop)
75 # Add in symbols for the microcode registers
76 for num in range(15):
77 assembler.symbols["t%d" % num] = "NUM_INTREGS+%d" % num
78 for num in range(7):
79 assembler.symbols["ufp%d" % num] = "FLOATREG_MICROFP(%d)" % num
80 # Add in symbols for the segment descriptor registers
81 for letter in ("C", "D", "E", "F", "G", "S"):
82 assembler.symbols["%ss" % letter.lower()] = "SEGMENT_REG_%sS" % letter
83
84 for reg in ("LDTR", "TR", "GDTR", "IDTR"):
85 assembler.symbols[reg.lower()] = "SYS_SEGMENT_REG_%s" % reg
86
83 # Miscellaneous symbols
84 symbols = {
85 "reg" : "env.reg",
86 "xmml" : "FLOATREG_XMM_LOW(env.reg)",
87 "xmmh" : "FLOATREG_XMM_HIGH(env.reg)",
88 "regm" : "env.regm",
89 "xmmlm" : "FLOATREG_XMM_LOW(env.regm)",
90 "xmmhm" : "FLOATREG_XMM_HIGH(env.regm)",
91 "imm" : "adjustedImm",
92 "disp" : "adjustedDisp",
93 "seg" : "env.seg",
94 "scale" : "env.scale",
95 "index" : "env.index",
96 "base" : "env.base",
97 "dsz" : "env.dataSize",
98 "asz" : "env.addressSize",
99 "ssz" : "env.stackSize"
100 }
101 assembler.symbols.update(symbols)
102
103 # Short hand for common scale-index-base combinations.
104 assembler.symbols["sib"] = \
105 [symbols["scale"], symbols["index"], symbols["base"]]
106 assembler.symbols["riprel"] = \
107 ["1", assembler.symbols["t0"], assembler.symbols["t7"]]
108
109 # This segment selects an internal address space mapped to MSRs,
110 # CPUID info, etc.
111 assembler.symbols["intseg"] = "SEGMENT_REG_INT"
112
113 for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di'):
114 assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper()
115
116 for reg in range(15):
117 assembler.symbols["cr%d" % reg] = "MISCREG_CR%d" % reg
118
119 for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF'):
120 assembler.symbols[flag] = flag + "Bit"
121
122 for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF',
123 'MSTRZ', 'STRZ', 'MSTRC',
124 'OF', 'CF', 'ZF', 'CvZF',
125 'SF', 'PF', 'SxOF', 'SxOvZF'):
126 assembler.symbols["C%s" % cond] = "ConditionTests::%s" % cond
127 assembler.symbols["nC%s" % cond] = "ConditionTests::Not%s" % cond
128 assembler.symbols["CSTRZnEZF"] = "ConditionTests::STRZnEZF"
129 assembler.symbols["CSTRnZnEZF"] = "ConditionTests::STRnZnEZF"
130
131 assembler.symbols["CTrue"] = "ConditionTests::True"
132 assembler.symbols["CFalse"] = "ConditionTests::False"
133
134 # Code literal which forces a default 64 bit operand size in 64 bit mode.
135 assembler.symbols["oszIn64Override"] = '''
136 if (machInst.mode.submode == SixtyFourBitMode &&
137 env.dataSize == 4)
138 env.dataSize = 8;
139 '''
140
87 # Miscellaneous symbols
88 symbols = {
89 "reg" : "env.reg",
90 "xmml" : "FLOATREG_XMM_LOW(env.reg)",
91 "xmmh" : "FLOATREG_XMM_HIGH(env.reg)",
92 "regm" : "env.regm",
93 "xmmlm" : "FLOATREG_XMM_LOW(env.regm)",
94 "xmmhm" : "FLOATREG_XMM_HIGH(env.regm)",
95 "imm" : "adjustedImm",
96 "disp" : "adjustedDisp",
97 "seg" : "env.seg",
98 "scale" : "env.scale",
99 "index" : "env.index",
100 "base" : "env.base",
101 "dsz" : "env.dataSize",
102 "asz" : "env.addressSize",
103 "ssz" : "env.stackSize"
104 }
105 assembler.symbols.update(symbols)
106
107 # Short hand for common scale-index-base combinations.
108 assembler.symbols["sib"] = \
109 [symbols["scale"], symbols["index"], symbols["base"]]
110 assembler.symbols["riprel"] = \
111 ["1", assembler.symbols["t0"], assembler.symbols["t7"]]
112
113 # This segment selects an internal address space mapped to MSRs,
114 # CPUID info, etc.
115 assembler.symbols["intseg"] = "SEGMENT_REG_INT"
116
117 for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di'):
118 assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper()
119
120 for reg in range(15):
121 assembler.symbols["cr%d" % reg] = "MISCREG_CR%d" % reg
122
123 for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF'):
124 assembler.symbols[flag] = flag + "Bit"
125
126 for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF',
127 'MSTRZ', 'STRZ', 'MSTRC',
128 'OF', 'CF', 'ZF', 'CvZF',
129 'SF', 'PF', 'SxOF', 'SxOvZF'):
130 assembler.symbols["C%s" % cond] = "ConditionTests::%s" % cond
131 assembler.symbols["nC%s" % cond] = "ConditionTests::Not%s" % cond
132 assembler.symbols["CSTRZnEZF"] = "ConditionTests::STRZnEZF"
133 assembler.symbols["CSTRnZnEZF"] = "ConditionTests::STRnZnEZF"
134
135 assembler.symbols["CTrue"] = "ConditionTests::True"
136 assembler.symbols["CFalse"] = "ConditionTests::False"
137
138 # Code literal which forces a default 64 bit operand size in 64 bit mode.
139 assembler.symbols["oszIn64Override"] = '''
140 if (machInst.mode.submode == SixtyFourBitMode &&
141 env.dataSize == 4)
142 env.dataSize = 8;
143 '''
144
145 assembler.symbols["oszForPseudoDesc"] = '''
146 if (machInst.mode.submode == SixtyFourBitMode)
147 env.dataSize = 8;
148 else
149 env.dataSize = 4;
150 '''
151
141 def trimImm(width):
142 return "adjustedImm = adjustedImm & mask(%s);" % width
143
144 assembler.symbols["trimImm"] = trimImm
145
146 def labeler(labelStr):
147 return "label_%s" % labelStr
148
149 assembler.symbols["label"] = labeler
150
151 def stack_index(index):
152 return "(NUM_FLOATREGS + (((%s) + 8) %% 8))" % index
153
154 assembler.symbols["st"] = stack_index
155
156 macroopDict = assembler.assemble(microcode)
157}};
152 def trimImm(width):
153 return "adjustedImm = adjustedImm & mask(%s);" % width
154
155 assembler.symbols["trimImm"] = trimImm
156
157 def labeler(labelStr):
158 return "label_%s" % labelStr
159
160 assembler.symbols["label"] = labeler
161
162 def stack_index(index):
163 return "(NUM_FLOATREGS + (((%s) + 8) %% 8))" % index
164
165 assembler.symbols["st"] = stack_index
166
167 macroopDict = assembler.assemble(microcode)
168}};