1# Copyright (c) 2007 The Hewlett-Packard Development Company
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Gabe Black
37
38microcode = '''
39
40# All the memory versions need to use LOCK, regardless of if it was set
41
42def macroop XCHG_R_R
43{
44 # Use the xor trick instead of moves to reduce register pressure.
45 # This probably doesn't make much of a difference, but it's easy.
46 xor reg, reg, regm
47 xor regm, regm, reg
48 xor reg, reg, regm
49};
50
51def macroop XCHG_R_M
52{
| 1# Copyright (c) 2007 The Hewlett-Packard Development Company
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Gabe Black
37
38microcode = '''
39
40# All the memory versions need to use LOCK, regardless of if it was set
41
42def macroop XCHG_R_R
43{
44 # Use the xor trick instead of moves to reduce register pressure.
45 # This probably doesn't make much of a difference, but it's easy.
46 xor reg, reg, regm
47 xor regm, regm, reg
48 xor reg, reg, regm
49};
50
51def macroop XCHG_R_M
52{
|
| 53 mfence
|
53 ldstl t1, seg, sib, disp
54 stul reg, seg, sib, disp
| 54 ldstl t1, seg, sib, disp
55 stul reg, seg, sib, disp
|
| 56 mfence
|
55 mov reg, reg, t1
56};
57
58def macroop XCHG_R_P
59{
60 rdip t7
| 57 mov reg, reg, t1
58};
59
60def macroop XCHG_R_P
61{
62 rdip t7
|
| 63 mfence
|
61 ldstl t1, seg, riprel, disp
62 stul reg, seg, riprel, disp
| 64 ldstl t1, seg, riprel, disp
65 stul reg, seg, riprel, disp
|
| 66 mfence
|
63 mov reg, reg, t1
64};
65
66def macroop XCHG_M_R
67{
| 67 mov reg, reg, t1
68};
69
70def macroop XCHG_M_R
71{
|
| 72 mfence
|
68 ldstl t1, seg, sib, disp
69 stul reg, seg, sib, disp
| 73 ldstl t1, seg, sib, disp
74 stul reg, seg, sib, disp
|
| 75 mfence
|
70 mov reg, reg, t1
71};
72
73def macroop XCHG_P_R
74{
75 rdip t7
| 76 mov reg, reg, t1
77};
78
79def macroop XCHG_P_R
80{
81 rdip t7
|
| 82 mfence
|
76 ldstl t1, seg, riprel, disp
77 stul reg, seg, riprel, disp
| 83 ldstl t1, seg, riprel, disp
84 stul reg, seg, riprel, disp
|
| 85 mfence
|
78 mov reg, reg, t1
79};
80
81def macroop XCHG_LOCKED_M_R
82{
| 86 mov reg, reg, t1
87};
88
89def macroop XCHG_LOCKED_M_R
90{
|
| 91 mfence
|
83 ldstl t1, seg, sib, disp
84 stul reg, seg, sib, disp
| 92 ldstl t1, seg, sib, disp
93 stul reg, seg, sib, disp
|
| 94 mfence
|
85 mov reg, reg, t1
86};
87
88def macroop XCHG_LOCKED_P_R
89{
90 rdip t7
| 95 mov reg, reg, t1
96};
97
98def macroop XCHG_LOCKED_P_R
99{
100 rdip t7
|
| 101 mfence
|
91 ldstl t1, seg, riprel, disp
92 stul reg, seg, riprel, disp
| 102 ldstl t1, seg, riprel, disp
103 stul reg, seg, riprel, disp
|
| 104 mfence
|
93 mov reg, reg, t1
94};
95'''
| 105 mov reg, reg, t1
106};
107'''
|