intmessage.hh (5651:7f0c8006c3d7) intmessage.hh (5654:340254de2031)
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 30 unchanged lines hidden (view full) ---

39
40namespace X86ISA
41{
42 BitUnion32(TriggerIntMessage)
43 Bitfield<7, 0> destination;
44 Bitfield<15, 8> vector;
45 Bitfield<18, 16> deliveryMode;
46 Bitfield<19> destMode;
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 30 unchanged lines hidden (view full) ---

39
40namespace X86ISA
41{
42 BitUnion32(TriggerIntMessage)
43 Bitfield<7, 0> destination;
44 Bitfield<15, 8> vector;
45 Bitfield<18, 16> deliveryMode;
46 Bitfield<19> destMode;
47 Bitfield<20> level;
48 Bitfield<21> trigger;
47 EndBitUnion(TriggerIntMessage)
48
49 EndBitUnion(TriggerIntMessage)
50
51 namespace DeliveryMode
52 {
53 enum IntDeliveryMode {
54 Fixed = 0,
55 LowestPriority = 1,
56 SMI = 2,
57 NMI = 4,
58 INIT = 5,
59 ExtInt = 7,
60 NumModes
61 };
62
63 static const char * const names[NumModes] = {
64 "Fixed", "LowestPriority", "SMI", "Reserved",
65 "NMI", "INIT", "Reserved", "ExtInt"
66 };
67
68 static inline bool
69 isUnmaskable(int mode)
70 {
71 return (mode == SMI || mode == NMI ||
72 mode == INIT || mode == ExtInt);
73 }
74
75 static inline bool
76 isMaskable(int mode)
77 {
78 return (mode == Fixed || mode == LowestPriority);
79 }
80
81 static inline bool
82 isReserved(int mode)
83 {
84 return !(isMaskable(mode) || isUnmaskable(mode));
85 }
86 }
87
49 static const Addr TriggerIntOffset = 0;
50
51 static inline PacketPtr
52 prepIntRequest(const uint8_t id, Addr offset, Addr size)
53 {
54 RequestPtr req = new Request(x86InterruptAddress(id, offset),
55 size, UNCACHEABLE);
56 PacketPtr pkt = new Packet(req, MemCmd::MessageReq, Packet::Broadcast);

--- 28 unchanged lines hidden --- 		88 static const Addr TriggerIntOffset = 0;
89
90 static inline PacketPtr
91 prepIntRequest(const uint8_t id, Addr offset, Addr size)
92 {
93 RequestPtr req = new Request(x86InterruptAddress(id, offset),
94 size, UNCACHEABLE);
95 PacketPtr pkt = new Packet(req, MemCmd::MessageReq, Packet::Broadcast);

--- 28 unchanged lines hidden ---