microldstop.hh (10467:dcf27c8220ac) microldstop.hh (11329:82bb3ee706b3)
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * Copyright (c) 2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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44#include "arch/x86/ldstflags.hh"
45#include "mem/packet.hh"
46#include "mem/request.hh"
47#include "sim/faults.hh"
48
49namespace X86ISA
50{
51 /**
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license
11 * terms below provided that you ensure that this notice is replicated

--- 33 unchanged lines hidden (view full) ---

45#include "arch/x86/ldstflags.hh"
46#include "mem/packet.hh"
47#include "mem/request.hh"
48#include "sim/faults.hh"
49
50namespace X86ISA
51{
52 /**
52 * Base class for load and store ops
53 * Base class for memory ops
53 */
54 */
54 class LdStOp : public X86MicroopBase
55 class MemOp : public X86MicroopBase
55 {
56 protected:
57 const uint8_t scale;
58 const RegIndex index;
59 const RegIndex base;
60 const uint64_t disp;
61 const uint8_t segment;
56 {
57 protected:
58 const uint8_t scale;
59 const RegIndex index;
60 const RegIndex base;
61 const uint64_t disp;
62 const uint8_t segment;
62 const RegIndex data;
63 const uint8_t dataSize;
64 const uint8_t addressSize;
65 const Request::FlagsType memFlags;
66 RegIndex foldOBit, foldABit;
67
68 //Constructor
63 const uint8_t dataSize;
64 const uint8_t addressSize;
65 const Request::FlagsType memFlags;
66 RegIndex foldOBit, foldABit;
67
68 //Constructor
69 LdStOp(ExtMachInst _machInst,
69 MemOp(ExtMachInst _machInst,
70 const char * mnem, const char * _instMnem,
71 uint64_t setFlags,
72 uint8_t _scale, InstRegIndex _index, InstRegIndex _base,
73 uint64_t _disp, InstRegIndex _segment,
70 const char * mnem, const char * _instMnem,
71 uint64_t setFlags,
72 uint8_t _scale, InstRegIndex _index, InstRegIndex _base,
73 uint64_t _disp, InstRegIndex _segment,
74 InstRegIndex _data,
75 uint8_t _dataSize, uint8_t _addressSize,
76 Request::FlagsType _memFlags,
77 OpClass __opClass) :
78 X86MicroopBase(_machInst, mnem, _instMnem, setFlags, __opClass),
79 scale(_scale), index(_index.idx), base(_base.idx),
80 disp(_disp), segment(_segment.idx),
74 uint8_t _dataSize, uint8_t _addressSize,
75 Request::FlagsType _memFlags,
76 OpClass __opClass) :
77 X86MicroopBase(_machInst, mnem, _instMnem, setFlags, __opClass),
78 scale(_scale), index(_index.idx), base(_base.idx),
79 disp(_disp), segment(_segment.idx),
81 data(_data.idx),
82 dataSize(_dataSize), addressSize(_addressSize),
83 memFlags(_memFlags | _segment.idx)
84 {
85 assert(_segment.idx < NUM_SEGMENTREGS);
80 dataSize(_dataSize), addressSize(_addressSize),
81 memFlags(_memFlags | _segment.idx)
82 {
83 assert(_segment.idx < NUM_SEGMENTREGS);
86 foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
84 foldOBit =
85 (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
87 foldABit =
88 (addressSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
89 }
86 foldABit =
87 (addressSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
88 }
89 };
90
90
91 /**
92 * Base class for load and store ops using one register
93 */
94 class LdStOp : public MemOp
95 {
96 protected:
97 const RegIndex data;
98
99 //Constructor
100 LdStOp(ExtMachInst _machInst,
101 const char * mnem, const char * _instMnem,
102 uint64_t setFlags,
103 uint8_t _scale, InstRegIndex _index, InstRegIndex _base,
104 uint64_t _disp, InstRegIndex _segment,
105 InstRegIndex _data,
106 uint8_t _dataSize, uint8_t _addressSize,
107 Request::FlagsType _memFlags,
108 OpClass __opClass) :
109 MemOp(_machInst, mnem, _instMnem, setFlags,
110 _scale, _index, _base, _disp, _segment,
111 _dataSize, _addressSize, _memFlags,
112 __opClass),
113 data(_data.idx)
114 {
115 }
116
91 std::string generateDisassembly(Addr pc,
92 const SymbolTable *symtab) const;
93 };
117 std::string generateDisassembly(Addr pc,
118 const SymbolTable *symtab) const;
119 };
120
121 /**
122 * Base class for load and store ops using two registers, we will
123 * call them split ops for this reason. These are mainly used to
124 * implement cmpxchg8b and cmpxchg16b.
125 */
126 class LdStSplitOp : public MemOp
127 {
128 protected:
129 const RegIndex dataLow;
130 const RegIndex dataHi;
131
132 //Constructor
133 LdStSplitOp(ExtMachInst _machInst,
134 const char * mnem, const char * _instMnem,
135 uint64_t setFlags,
136 uint8_t _scale, InstRegIndex _index, InstRegIndex _base,
137 uint64_t _disp, InstRegIndex _segment,
138 InstRegIndex _dataLow, InstRegIndex _dataHi,
139 uint8_t _dataSize, uint8_t _addressSize,
140 Request::FlagsType _memFlags,
141 OpClass __opClass) :
142 MemOp(_machInst, mnem, _instMnem, setFlags,
143 _scale, _index, _base, _disp, _segment,
144 _dataSize, _addressSize, _memFlags,
145 __opClass),
146 dataLow(_dataLow.idx),
147 dataHi(_dataHi.idx)
148 {
149 }
150
151 std::string generateDisassembly(Addr pc,
152 const SymbolTable *symtab) const;
153 };
94}
95
96#endif //__ARCH_X86_INSTS_MICROLDSTOP_HH__
154}
155
156#endif //__ARCH_X86_INSTS_MICROLDSTOP_HH__