1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39
40#ifndef __ARCH_X86_INSTS_MICROLDSTOP_HH__
41#define __ARCH_X86_INSTS_MICROLDSTOP_HH__
42
43#include "arch/x86/insts/microop.hh"
44#include "mem/packet.hh"
45#include "mem/request.hh"
46
47namespace X86ISA
48{
49 const Request::FlagsType SegmentFlagMask = mask(4);
50 const int FlagShift = 4;
51 enum FlagBit {
52 CPL0FlagBit = 1,
53 AddrSizeFlagBit = 2,
54 StoreCheck = 4
55 };
56
57 /**
58 * Base class for load and store ops
59 */
60 class LdStOp : public X86MicroopBase
61 {
62 protected:
63 const uint8_t scale;
64 const RegIndex index;
65 const RegIndex base;
66 const uint64_t disp;
67 const uint8_t segment;
68 const RegIndex data;
69 const uint8_t dataSize;
70 const uint8_t addressSize;
71 const Request::FlagsType memFlags;
72 RegIndex foldOBit, foldABit;
73
74 //Constructor
75 LdStOp(ExtMachInst _machInst,
76 const char * mnem, const char * _instMnem,
| 1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39
40#ifndef __ARCH_X86_INSTS_MICROLDSTOP_HH__
41#define __ARCH_X86_INSTS_MICROLDSTOP_HH__
42
43#include "arch/x86/insts/microop.hh"
44#include "mem/packet.hh"
45#include "mem/request.hh"
46
47namespace X86ISA
48{
49 const Request::FlagsType SegmentFlagMask = mask(4);
50 const int FlagShift = 4;
51 enum FlagBit {
52 CPL0FlagBit = 1,
53 AddrSizeFlagBit = 2,
54 StoreCheck = 4
55 };
56
57 /**
58 * Base class for load and store ops
59 */
60 class LdStOp : public X86MicroopBase
61 {
62 protected:
63 const uint8_t scale;
64 const RegIndex index;
65 const RegIndex base;
66 const uint64_t disp;
67 const uint8_t segment;
68 const RegIndex data;
69 const uint8_t dataSize;
70 const uint8_t addressSize;
71 const Request::FlagsType memFlags;
72 RegIndex foldOBit, foldABit;
73
74 //Constructor
75 LdStOp(ExtMachInst _machInst,
76 const char * mnem, const char * _instMnem,
|
77 bool isMicro, bool isDelayed, bool isFirst, bool isLast,
| 77 uint64_t setFlags,
|
78 uint8_t _scale, InstRegIndex _index, InstRegIndex _base,
79 uint64_t _disp, InstRegIndex _segment,
80 InstRegIndex _data,
81 uint8_t _dataSize, uint8_t _addressSize,
82 Request::FlagsType _memFlags,
83 OpClass __opClass) :
| 78 uint8_t _scale, InstRegIndex _index, InstRegIndex _base,
79 uint64_t _disp, InstRegIndex _segment,
80 InstRegIndex _data,
81 uint8_t _dataSize, uint8_t _addressSize,
82 Request::FlagsType _memFlags,
83 OpClass __opClass) :
|
84 X86MicroopBase(machInst, mnem, _instMnem,
85 isMicro, isDelayed, isFirst, isLast, __opClass),
| 84 X86MicroopBase(machInst, mnem, _instMnem, setFlags, __opClass),
|
86 scale(_scale), index(_index.idx), base(_base.idx),
87 disp(_disp), segment(_segment.idx),
88 data(_data.idx),
89 dataSize(_dataSize), addressSize(_addressSize),
90 memFlags(_memFlags | _segment.idx)
91 {
92 assert(_segment.idx < NUM_SEGMENTREGS);
93 foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
94 foldABit =
95 (addressSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
96 }
97
98 std::string generateDisassembly(Addr pc,
99 const SymbolTable *symtab) const;
100
101 template<class Context, class MemType>
102 Fault read(Context *xc, Addr EA, MemType & Mem, unsigned flags) const
103 {
104 Fault fault = NoFault;
105 switch(dataSize)
106 {
107 case 1:
108 fault = xc->read(EA, (uint8_t&)Mem, flags);
109 break;
110 case 2:
111 fault = xc->read(EA, (uint16_t&)Mem, flags);
112 break;
113 case 4:
114 fault = xc->read(EA, (uint32_t&)Mem, flags);
115 break;
116 case 8:
117 fault = xc->read(EA, (uint64_t&)Mem, flags);
118 break;
119 default:
120 panic("Bad operand size %d for read at %#x.\n", dataSize, EA);
121 }
122 return fault;
123 }
124
125 template<class Context, class MemType>
126 Fault write(Context *xc, MemType & Mem, Addr EA, unsigned flags) const
127 {
128 Fault fault = NoFault;
129 switch(dataSize)
130 {
131 case 1:
132 fault = xc->write((uint8_t&)Mem, EA, flags, 0);
133 break;
134 case 2:
135 fault = xc->write((uint16_t&)Mem, EA, flags, 0);
136 break;
137 case 4:
138 fault = xc->write((uint32_t&)Mem, EA, flags, 0);
139 break;
140 case 8:
141 fault = xc->write((uint64_t&)Mem, EA, flags, 0);
142 break;
143 default:
144 panic("Bad operand size %d for write at %#x.\n", dataSize, EA);
145 }
146 return fault;
147 }
148
149 uint64_t
150 get(PacketPtr pkt) const
151 {
152 switch(dataSize)
153 {
154 case 1:
155 return pkt->get<uint8_t>();
156 case 2:
157 return pkt->get<uint16_t>();
158 case 4:
159 return pkt->get<uint32_t>();
160 case 8:
161 return pkt->get<uint64_t>();
162 default:
163 panic("Bad operand size %d for read at %#x.\n",
164 dataSize, pkt->getAddr());
165 }
166 }
167 };
168}
169
170#endif //__ARCH_X86_INSTS_MICROLDSTOP_HH__
| 85 scale(_scale), index(_index.idx), base(_base.idx),
86 disp(_disp), segment(_segment.idx),
87 data(_data.idx),
88 dataSize(_dataSize), addressSize(_addressSize),
89 memFlags(_memFlags | _segment.idx)
90 {
91 assert(_segment.idx < NUM_SEGMENTREGS);
92 foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
93 foldABit =
94 (addressSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
95 }
96
97 std::string generateDisassembly(Addr pc,
98 const SymbolTable *symtab) const;
99
100 template<class Context, class MemType>
101 Fault read(Context *xc, Addr EA, MemType & Mem, unsigned flags) const
102 {
103 Fault fault = NoFault;
104 switch(dataSize)
105 {
106 case 1:
107 fault = xc->read(EA, (uint8_t&)Mem, flags);
108 break;
109 case 2:
110 fault = xc->read(EA, (uint16_t&)Mem, flags);
111 break;
112 case 4:
113 fault = xc->read(EA, (uint32_t&)Mem, flags);
114 break;
115 case 8:
116 fault = xc->read(EA, (uint64_t&)Mem, flags);
117 break;
118 default:
119 panic("Bad operand size %d for read at %#x.\n", dataSize, EA);
120 }
121 return fault;
122 }
123
124 template<class Context, class MemType>
125 Fault write(Context *xc, MemType & Mem, Addr EA, unsigned flags) const
126 {
127 Fault fault = NoFault;
128 switch(dataSize)
129 {
130 case 1:
131 fault = xc->write((uint8_t&)Mem, EA, flags, 0);
132 break;
133 case 2:
134 fault = xc->write((uint16_t&)Mem, EA, flags, 0);
135 break;
136 case 4:
137 fault = xc->write((uint32_t&)Mem, EA, flags, 0);
138 break;
139 case 8:
140 fault = xc->write((uint64_t&)Mem, EA, flags, 0);
141 break;
142 default:
143 panic("Bad operand size %d for write at %#x.\n", dataSize, EA);
144 }
145 return fault;
146 }
147
148 uint64_t
149 get(PacketPtr pkt) const
150 {
151 switch(dataSize)
152 {
153 case 1:
154 return pkt->get<uint8_t>();
155 case 2:
156 return pkt->get<uint16_t>();
157 case 4:
158 return pkt->get<uint32_t>();
159 case 8:
160 return pkt->get<uint64_t>();
161 default:
162 panic("Bad operand size %d for read at %#x.\n",
163 dataSize, pkt->getAddr());
164 }
165 }
166 };
167}
168
169#endif //__ARCH_X86_INSTS_MICROLDSTOP_HH__
|