faults.hh (5139:2422708d4fcb) faults.hh (5237:6c819dbe8045)
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
8 *
9 * The software must be used only for Non-Commercial Use which means any
10 * use which is NOT directed to receiving any direct monetary
11 * compensation for, or commercial advantage from such use. Illustrative
12 * examples of non-commercial use are academic research, personal study,
13 * teaching, education and corporate research & development.
14 * Illustrative examples of commercial use are distributing products for
15 * commercial advantage and providing services using the software for
16 * commercial advantage.
17 *
18 * If you wish to use this software or functionality therein that may be
19 * covered by patents for commercial use, please contact:
20 * Director of Intellectual Property Licensing
21 * Office of Strategy and Technology
22 * Hewlett-Packard Company
23 * 1501 Page Mill Road
24 * Palo Alto, California 94304
25 *
26 * Redistributions of source code must retain the above copyright notice,
27 * this list of conditions and the following disclaimer. Redistributions
28 * in binary form must reproduce the above copyright notice, this list of
29 * conditions and the following disclaimer in the documentation and/or
30 * other materials provided with the distribution. Neither the name of
31 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
32 * contributors may be used to endorse or promote products derived from
33 * this software without specific prior written permission. No right of
34 * sublicense is granted herewith. Derivatives of the software and
35 * output created using the software may be prepared, but only for
36 * Non-Commercial Uses. Derivatives of the software may be shared with
37 * others provided: (i) the others agree to abide by the list of
38 * conditions herein which includes the Non-Commercial Use restrictions;
39 * and (ii) such Derivatives of the software include the above copyright
40 * notice to acknowledge the contribution from this software where
41 * applicable, this list of conditions and the disclaimer below.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 *
55 * Authors: Gabe Black
56 */
57
58#ifndef __ARCH_X86_FAULTS_HH__
59#define __ARCH_X86_FAULTS_HH__
60
61#include "base/misc.hh"
62#include "sim/faults.hh"
63
64namespace X86ISA
65{
66 // Base class for all x86 "faults" where faults is in the m5 sense
67 class X86FaultBase : public FaultBase
68 {
69 protected:
70 const char * faultName;
71 const char * mnem;
72 uint64_t errorCode;
73
74 X86FaultBase(const char * _faultName, const char * _mnem,
75 uint64_t _errorCode = 0) :
76 faultName(_faultName), mnem(_mnem), errorCode(_errorCode)
77 {
78 }
79
80 const char * name() const
81 {
82 return faultName;
83 }
84
85 virtual bool isBenign()
86 {
87 return true;
88 }
89
90 virtual const char * mnemonic() const
91 {
92 return mnem;
93 }
94 };
95
96 // Base class for x86 faults which behave as if the underlying instruction
97 // didn't happen.
98 class X86Fault : public X86FaultBase
99 {
100 protected:
101 X86Fault(const char * name, const char * mnem,
102 uint64_t _errorCode = 0) :
103 X86FaultBase(name, mnem, _errorCode)
104 {}
105 };
106
107 // Base class for x86 traps which behave as if the underlying instruction
108 // completed.
109 class X86Trap : public X86FaultBase
110 {
111 protected:
112 X86Trap(const char * name, const char * mnem,
113 uint64_t _errorCode = 0) :
114 X86FaultBase(name, mnem, _errorCode)
115 {}
116
117#if FULL_SYSTEM
118 void invoke(ThreadContext * tc);
119#endif
120 };
121
122 // Base class for x86 aborts which seem to be catastrophic failures.
123 class X86Abort : public X86FaultBase
124 {
125 protected:
126 X86Abort(const char * name, const char * mnem,
127 uint64_t _errorCode = 0) :
128 X86FaultBase(name, mnem, _errorCode)
129 {}
130
131#if FULL_SYSTEM
132 void invoke(ThreadContext * tc);
133#endif
134 };
135
136 // Base class for x86 interrupts.
137 class X86Interrupt : public X86FaultBase
138 {
139 protected:
140 X86Interrupt(const char * name, const char * mnem,
141 uint64_t _errorCode = 0) :
142 X86FaultBase(name, mnem, _errorCode)
143 {}
144
145#if FULL_SYSTEM
146 void invoke(ThreadContext * tc);
147#endif
148 };
149
150 class UnimpInstFault : public FaultBase
151 {
152 public:
153 const char * name() const
154 {
155 return "unimplemented_micro";
156 }
157
158 void invoke(ThreadContext * tc)
159 {
160 panic("Unimplemented instruction!");
161 }
162 };
163
164 static inline Fault genMachineCheckFault()
165 {
166 panic("Machine check fault not implemented in x86!\n");
167 }
168
169 // Below is a summary of the interrupt/exception information in the
170 // architecture manuals.
171
172 // Class | Type | vector | Cause | mnem
173 //------------------------------------------------------------------------
174 //Contrib Fault 0 Divide-by-Zero-Error #DE
175 //Benign Either 1 Debug #DB
176 //Benign Interrupt 2 Non-Maskable-Interrupt #NMI
177 //Benign Trap 3 Breakpoint #BP
178 //Benign Trap 4 Overflow #OF
179 //Benign Fault 5 Bound-Range #BR
180 //Benign Fault 6 Invalid-Opcode #UD
181 //Benign Fault 7 Device-Not-Available #NM
182 //Benign Abort 8 Double-Fault #DF
183 // 9 Coprocessor-Segment-Overrun
184 //Contrib Fault 10 Invalid-TSS #TS
185 //Contrib Fault 11 Segment-Not-Present #NP
186 //Contrib Fault 12 Stack #SS
187 //Contrib Fault 13 General-Protection #GP
188 //Either Fault 14 Page-Fault #PF
189 // 15 Reserved
190 //Benign Fault 16 x87 Floating-Point Exception Pending #MF
191 //Benign Fault 17 Alignment-Check #AC
192 //Benign Abort 18 Machine-Check #MC
193 //Benign Fault 19 SIMD Floating-Point #XF
194 // 20-29 Reserved
195 //Contrib ? 30 Security Exception #SX
196 // 31 Reserved
197 //Benign Interrupt 0-255 External Interrupts #INTR
198 //Benign Interrupt 0-255 Software Interrupts INTn
199
200 class DivideByZero : public X86Fault
201 {
202 public:
203 DivideByZero() :
204 X86Fault("Divide-by-Zero-Error", "#DE")
205 {}
206 };
207
208 class DebugException : public X86FaultBase
209 {
210 public:
211 DebugException() :
212 X86FaultBase("Debug", "#DB")
213 {}
214 };
215
216 class NonMaskableInterrupt : public X86Interrupt
217 {
218 public:
219 NonMaskableInterrupt() :
220 X86Interrupt("Non-Maskable-Interrupt", "#NMI")
221 {}
222 };
223
224 class Breakpoint : public X86Trap
225 {
226 public:
227 Breakpoint() :
228 X86Trap("Breakpoint", "#BP")
229 {}
230 };
231
232 class OverflowTrap : public X86Trap
233 {
234 public:
235 OverflowTrap() :
236 X86Trap("Overflow", "#OF")
237 {}
238 };
239
240 class BoundRange : public X86Fault
241 {
242 public:
243 BoundRange() :
244 X86Fault("Bound-Range", "#BR")
245 {}
246 };
247
248 class InvalidOpcode : public X86Fault
249 {
250 public:
251 InvalidOpcode() :
252 X86Fault("Invalid-Opcode", "#UD")
253 {}
254 };
255
256 class DeviceNotAvailable : public X86Fault
257 {
258 public:
259 DeviceNotAvailable() :
260 X86Fault("Device-Not-Available", "#NM")
261 {}
262 };
263
264 class DoubleFault : public X86Abort
265 {
266 public:
267 DoubleFault() :
268 X86Abort("Double-Fault", "#DF")
269 {}
270 };
271
272 class InvalidTSS : public X86Fault
273 {
274 public:
275 InvalidTSS() :
276 X86Fault("Invalid-TSS", "#TS")
277 {}
278 };
279
280 class SegmentNotPresent : public X86Fault
281 {
282 public:
283 SegmentNotPresent() :
284 X86Fault("Segment-Not-Present", "#NP")
285 {}
286 };
287
288 class StackFault : public X86Fault
289 {
290 public:
291 StackFault() :
292 X86Fault("Stack", "#SS")
293 {}
294 };
295
296 class GeneralProtection : public X86Fault
297 {
298 public:
299 GeneralProtection(uint64_t _errorCode) :
300 X86Fault("General-Protection", "#GP", _errorCode)
301 {}
302 };
303
304 class PageFault : public X86Fault
305 {
306 public:
307 PageFault() :
308 X86Fault("Page-Fault", "#PF")
309 {}
310 };
311
312 class X87FpExceptionPending : public X86Fault
313 {
314 public:
315 X87FpExceptionPending() :
316 X86Fault("x87 Floating-Point Exception Pending", "#MF")
317 {}
318 };
319
320 class AlignmentCheck : X86Fault
321 {
322 public:
323 AlignmentCheck() :
324 X86Fault("Alignment-Check", "#AC")
325 {}
326 };
327
328 class MachineCheck : X86Abort
329 {
330 public:
331 MachineCheck() :
332 X86Abort("Machine-Check", "#MC")
333 {}
334 };
335
336 class SIMDFloatingPointFault : X86Fault
337 {
338 public:
339 SIMDFloatingPointFault() :
340 X86Fault("SIMD Floating-Point", "#XF")
341 {}
342 };
343
344 class SecurityException : X86FaultBase
345 {
346 public:
347 SecurityException() :
348 X86FaultBase("Security Exception", "#SX")
349 {}
350 };
351
352 class ExternalInterrupt : X86Interrupt
353 {
354 public:
355 ExternalInterrupt() :
356 X86Interrupt("External Interrupt", "#INTR")
357 {}
358 };
359
360 class SoftwareInterrupt : X86Interrupt
361 {
362 public:
363 SoftwareInterrupt() :
364 X86Interrupt("Software Interrupt", "INTn")
365 {}
366 };
367
368 // These faults aren't part of the ISA definition. They trigger filling
369 // the tlb on a miss and are to take the place of a hardware table walker.
370 class FakeITLBFault : public X86Fault
371 {
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
8 *
9 * The software must be used only for Non-Commercial Use which means any
10 * use which is NOT directed to receiving any direct monetary
11 * compensation for, or commercial advantage from such use. Illustrative
12 * examples of non-commercial use are academic research, personal study,
13 * teaching, education and corporate research & development.
14 * Illustrative examples of commercial use are distributing products for
15 * commercial advantage and providing services using the software for
16 * commercial advantage.
17 *
18 * If you wish to use this software or functionality therein that may be
19 * covered by patents for commercial use, please contact:
20 * Director of Intellectual Property Licensing
21 * Office of Strategy and Technology
22 * Hewlett-Packard Company
23 * 1501 Page Mill Road
24 * Palo Alto, California 94304
25 *
26 * Redistributions of source code must retain the above copyright notice,
27 * this list of conditions and the following disclaimer. Redistributions
28 * in binary form must reproduce the above copyright notice, this list of
29 * conditions and the following disclaimer in the documentation and/or
30 * other materials provided with the distribution. Neither the name of
31 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
32 * contributors may be used to endorse or promote products derived from
33 * this software without specific prior written permission. No right of
34 * sublicense is granted herewith. Derivatives of the software and
35 * output created using the software may be prepared, but only for
36 * Non-Commercial Uses. Derivatives of the software may be shared with
37 * others provided: (i) the others agree to abide by the list of
38 * conditions herein which includes the Non-Commercial Use restrictions;
39 * and (ii) such Derivatives of the software include the above copyright
40 * notice to acknowledge the contribution from this software where
41 * applicable, this list of conditions and the disclaimer below.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 *
55 * Authors: Gabe Black
56 */
57
58#ifndef __ARCH_X86_FAULTS_HH__
59#define __ARCH_X86_FAULTS_HH__
60
61#include "base/misc.hh"
62#include "sim/faults.hh"
63
64namespace X86ISA
65{
66 // Base class for all x86 "faults" where faults is in the m5 sense
67 class X86FaultBase : public FaultBase
68 {
69 protected:
70 const char * faultName;
71 const char * mnem;
72 uint64_t errorCode;
73
74 X86FaultBase(const char * _faultName, const char * _mnem,
75 uint64_t _errorCode = 0) :
76 faultName(_faultName), mnem(_mnem), errorCode(_errorCode)
77 {
78 }
79
80 const char * name() const
81 {
82 return faultName;
83 }
84
85 virtual bool isBenign()
86 {
87 return true;
88 }
89
90 virtual const char * mnemonic() const
91 {
92 return mnem;
93 }
94 };
95
96 // Base class for x86 faults which behave as if the underlying instruction
97 // didn't happen.
98 class X86Fault : public X86FaultBase
99 {
100 protected:
101 X86Fault(const char * name, const char * mnem,
102 uint64_t _errorCode = 0) :
103 X86FaultBase(name, mnem, _errorCode)
104 {}
105 };
106
107 // Base class for x86 traps which behave as if the underlying instruction
108 // completed.
109 class X86Trap : public X86FaultBase
110 {
111 protected:
112 X86Trap(const char * name, const char * mnem,
113 uint64_t _errorCode = 0) :
114 X86FaultBase(name, mnem, _errorCode)
115 {}
116
117#if FULL_SYSTEM
118 void invoke(ThreadContext * tc);
119#endif
120 };
121
122 // Base class for x86 aborts which seem to be catastrophic failures.
123 class X86Abort : public X86FaultBase
124 {
125 protected:
126 X86Abort(const char * name, const char * mnem,
127 uint64_t _errorCode = 0) :
128 X86FaultBase(name, mnem, _errorCode)
129 {}
130
131#if FULL_SYSTEM
132 void invoke(ThreadContext * tc);
133#endif
134 };
135
136 // Base class for x86 interrupts.
137 class X86Interrupt : public X86FaultBase
138 {
139 protected:
140 X86Interrupt(const char * name, const char * mnem,
141 uint64_t _errorCode = 0) :
142 X86FaultBase(name, mnem, _errorCode)
143 {}
144
145#if FULL_SYSTEM
146 void invoke(ThreadContext * tc);
147#endif
148 };
149
150 class UnimpInstFault : public FaultBase
151 {
152 public:
153 const char * name() const
154 {
155 return "unimplemented_micro";
156 }
157
158 void invoke(ThreadContext * tc)
159 {
160 panic("Unimplemented instruction!");
161 }
162 };
163
164 static inline Fault genMachineCheckFault()
165 {
166 panic("Machine check fault not implemented in x86!\n");
167 }
168
169 // Below is a summary of the interrupt/exception information in the
170 // architecture manuals.
171
172 // Class | Type | vector | Cause | mnem
173 //------------------------------------------------------------------------
174 //Contrib Fault 0 Divide-by-Zero-Error #DE
175 //Benign Either 1 Debug #DB
176 //Benign Interrupt 2 Non-Maskable-Interrupt #NMI
177 //Benign Trap 3 Breakpoint #BP
178 //Benign Trap 4 Overflow #OF
179 //Benign Fault 5 Bound-Range #BR
180 //Benign Fault 6 Invalid-Opcode #UD
181 //Benign Fault 7 Device-Not-Available #NM
182 //Benign Abort 8 Double-Fault #DF
183 // 9 Coprocessor-Segment-Overrun
184 //Contrib Fault 10 Invalid-TSS #TS
185 //Contrib Fault 11 Segment-Not-Present #NP
186 //Contrib Fault 12 Stack #SS
187 //Contrib Fault 13 General-Protection #GP
188 //Either Fault 14 Page-Fault #PF
189 // 15 Reserved
190 //Benign Fault 16 x87 Floating-Point Exception Pending #MF
191 //Benign Fault 17 Alignment-Check #AC
192 //Benign Abort 18 Machine-Check #MC
193 //Benign Fault 19 SIMD Floating-Point #XF
194 // 20-29 Reserved
195 //Contrib ? 30 Security Exception #SX
196 // 31 Reserved
197 //Benign Interrupt 0-255 External Interrupts #INTR
198 //Benign Interrupt 0-255 Software Interrupts INTn
199
200 class DivideByZero : public X86Fault
201 {
202 public:
203 DivideByZero() :
204 X86Fault("Divide-by-Zero-Error", "#DE")
205 {}
206 };
207
208 class DebugException : public X86FaultBase
209 {
210 public:
211 DebugException() :
212 X86FaultBase("Debug", "#DB")
213 {}
214 };
215
216 class NonMaskableInterrupt : public X86Interrupt
217 {
218 public:
219 NonMaskableInterrupt() :
220 X86Interrupt("Non-Maskable-Interrupt", "#NMI")
221 {}
222 };
223
224 class Breakpoint : public X86Trap
225 {
226 public:
227 Breakpoint() :
228 X86Trap("Breakpoint", "#BP")
229 {}
230 };
231
232 class OverflowTrap : public X86Trap
233 {
234 public:
235 OverflowTrap() :
236 X86Trap("Overflow", "#OF")
237 {}
238 };
239
240 class BoundRange : public X86Fault
241 {
242 public:
243 BoundRange() :
244 X86Fault("Bound-Range", "#BR")
245 {}
246 };
247
248 class InvalidOpcode : public X86Fault
249 {
250 public:
251 InvalidOpcode() :
252 X86Fault("Invalid-Opcode", "#UD")
253 {}
254 };
255
256 class DeviceNotAvailable : public X86Fault
257 {
258 public:
259 DeviceNotAvailable() :
260 X86Fault("Device-Not-Available", "#NM")
261 {}
262 };
263
264 class DoubleFault : public X86Abort
265 {
266 public:
267 DoubleFault() :
268 X86Abort("Double-Fault", "#DF")
269 {}
270 };
271
272 class InvalidTSS : public X86Fault
273 {
274 public:
275 InvalidTSS() :
276 X86Fault("Invalid-TSS", "#TS")
277 {}
278 };
279
280 class SegmentNotPresent : public X86Fault
281 {
282 public:
283 SegmentNotPresent() :
284 X86Fault("Segment-Not-Present", "#NP")
285 {}
286 };
287
288 class StackFault : public X86Fault
289 {
290 public:
291 StackFault() :
292 X86Fault("Stack", "#SS")
293 {}
294 };
295
296 class GeneralProtection : public X86Fault
297 {
298 public:
299 GeneralProtection(uint64_t _errorCode) :
300 X86Fault("General-Protection", "#GP", _errorCode)
301 {}
302 };
303
304 class PageFault : public X86Fault
305 {
306 public:
307 PageFault() :
308 X86Fault("Page-Fault", "#PF")
309 {}
310 };
311
312 class X87FpExceptionPending : public X86Fault
313 {
314 public:
315 X87FpExceptionPending() :
316 X86Fault("x87 Floating-Point Exception Pending", "#MF")
317 {}
318 };
319
320 class AlignmentCheck : X86Fault
321 {
322 public:
323 AlignmentCheck() :
324 X86Fault("Alignment-Check", "#AC")
325 {}
326 };
327
328 class MachineCheck : X86Abort
329 {
330 public:
331 MachineCheck() :
332 X86Abort("Machine-Check", "#MC")
333 {}
334 };
335
336 class SIMDFloatingPointFault : X86Fault
337 {
338 public:
339 SIMDFloatingPointFault() :
340 X86Fault("SIMD Floating-Point", "#XF")
341 {}
342 };
343
344 class SecurityException : X86FaultBase
345 {
346 public:
347 SecurityException() :
348 X86FaultBase("Security Exception", "#SX")
349 {}
350 };
351
352 class ExternalInterrupt : X86Interrupt
353 {
354 public:
355 ExternalInterrupt() :
356 X86Interrupt("External Interrupt", "#INTR")
357 {}
358 };
359
360 class SoftwareInterrupt : X86Interrupt
361 {
362 public:
363 SoftwareInterrupt() :
364 X86Interrupt("Software Interrupt", "INTn")
365 {}
366 };
367
368 // These faults aren't part of the ISA definition. They trigger filling
369 // the tlb on a miss and are to take the place of a hardware table walker.
370 class FakeITLBFault : public X86Fault
371 {
372#if !FULL_SYSTEM
373 protected:
374 Addr vaddr;
375 public:
376 FakeITLBFault(Addr _vaddr) :
377 X86Fault("fake instruction tlb fault", "itlb"),
378 vaddr(_vaddr)
372 protected:
373 Addr vaddr;
374 public:
375 FakeITLBFault(Addr _vaddr) :
376 X86Fault("fake instruction tlb fault", "itlb"),
377 vaddr(_vaddr)
379#else
380 public:
381 FakeITLBFault() :
382 X86Fault("fake instruction tlb fault", "itlb")
383#endif
384 {}
385
378 {}
379
386#if !FULL_SYSTEM
387 void invoke(ThreadContext * tc);
380 void invoke(ThreadContext * tc);
388#endif
389 };
390
391 class FakeDTLBFault : public X86Fault
392 {
381 };
382
383 class FakeDTLBFault : public X86Fault
384 {
393#if !FULL_SYSTEM
394 protected:
395 Addr vaddr;
396 public:
397 FakeDTLBFault(Addr _vaddr) :
398 X86Fault("fake data tlb fault", "dtlb"),
399 vaddr(_vaddr)
385 protected:
386 Addr vaddr;
387 public:
388 FakeDTLBFault(Addr _vaddr) :
389 X86Fault("fake data tlb fault", "dtlb"),
390 vaddr(_vaddr)
400#else
401 public:
402 FakeDTLBFault() :
403 X86Fault("fake data tlb fault", "dtlb")
404#endif
405 {}
406
391 {}
392
407#if !FULL_SYSTEM
408 void invoke(ThreadContext * tc);
393 void invoke(ThreadContext * tc);
409#endif
410 };
411};
412
413#endif // __ARCH_X86_FAULTS_HH__
394 };
395};
396
397#endif // __ARCH_X86_FAULTS_HH__