tlb.cc (8232:b28d06a175be) tlb.cc (8374:18173b099ed1)
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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45#include "sim/system.hh"
46
47/* @todo remove some of the magic constants. -- ali
48 * */
49namespace SparcISA {
50
51TLB::TLB(const Params *p)
52 : BaseTLB(p), size(p->size), usedEntries(0), lastReplaced(0),
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 36 unchanged lines hidden (view full) ---

45#include "sim/system.hh"
46
47/* @todo remove some of the magic constants. -- ali
48 * */
49namespace SparcISA {
50
51TLB::TLB(const Params *p)
52 : BaseTLB(p), size(p->size), usedEntries(0), lastReplaced(0),
53 cacheValid(false)
53 cacheState(0), cacheValid(false)
54{
55 // To make this work you'll have to change the hypervisor and OS
56 if (size > 64)
57 fatal("SPARC T1 TLB registers don't support more than 64 TLB entries");
58
59 tlb = new TlbEntry[size];
60 std::memset(tlb, 0, sizeof(TlbEntry) * size);
61

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54{
55 // To make this work you'll have to change the hypervisor and OS
56 if (size > 64)
57 fatal("SPARC T1 TLB registers don't support more than 64 TLB entries");
58
59 tlb = new TlbEntry[size];
60 std::memset(tlb, 0, sizeof(TlbEntry) * size);
61

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