tlb.cc (3804:fa7a01dddc7a) tlb.cc (3806:65ae5388c059)
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 494 unchanged lines hidden (view full) ---

503 if (!priv && e->pte.priv()) {
504 writeSfr(tc, vaddr, write, ct, e->pte.sideffect(), PrivViolation, asi);
505 return new DataAccessException;
506 }
507
508 req->setPaddr(e->pte.paddr() & ~e->pte.size() |
509 req->getVaddr() & e->pte.size());
510 return NoFault;
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 494 unchanged lines hidden (view full) ---

503 if (!priv && e->pte.priv()) {
504 writeSfr(tc, vaddr, write, ct, e->pte.sideffect(), PrivViolation, asi);
505 return new DataAccessException;
506 }
507
508 req->setPaddr(e->pte.paddr() & ~e->pte.size() |
509 req->getVaddr() & e->pte.size());
510 return NoFault;
511 /*** End of normal Path ***/
511 /** Normal flow ends here. */
512
512
513handleMmuRegAccess:
514handleScratchRegAccess:
513handleScratchRegAccess:
515 panic("How are we ever going to deal with this?\n");
514 if (vaddr > 0x38 || (vaddr >= 0x20 && vaddr < 0x30 && !hpriv)) {
515 writeSfr(tc, vaddr, write, Primary, true, IllegalAsi, asi);
516 return new DataAccessException;
517 }
518handleMmuRegAccess:
519 req->setMmapedIpr(true);
520 req->setPaddr(req->getVaddr());
521 return NoFault;
516};
517
522};
523
524Tick
525DTB::doMmuRegRead(ThreadContext *tc, Packet *pkt)
526{
527 panic("need to implement DTB::doMmuRegRead()\n");
528}
529
530Tick
531DTB::doMmuRegWrite(ThreadContext *tc, Packet *pkt)
532{
533 panic("need to implement DTB::doMmuRegWrite()\n");
534}
535
518void
519TLB::serialize(std::ostream &os)
520{
521 panic("Need to implement serialize tlb for SPARC\n");
522}
523
524void
525TLB::unserialize(Checkpoint *cp, const std::string &section)

--- 47 unchanged lines hidden --- 		536void
537TLB::serialize(std::ostream &os)
538{
539 panic("Need to implement serialize tlb for SPARC\n");
540}
541
542void
543TLB::unserialize(Checkpoint *cp, const std::string &section)

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