tlb.cc (13912:53531772924f) tlb.cc (14271:edb5f954d6ad)
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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56 : BaseTLB(p), size(p->size), usedEntries(0), lastReplaced(0),
57 cacheState(0), cacheValid(false)
58{
59 // To make this work you'll have to change the hypervisor and OS
60 if (size > 64)
61 fatal("SPARC T1 TLB registers don't support more than 64 TLB entries");
62
63 tlb = new TlbEntry[size];
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 47 unchanged lines hidden (view full) ---

56 : BaseTLB(p), size(p->size), usedEntries(0), lastReplaced(0),
57 cacheState(0), cacheValid(false)
58{
59 // To make this work you'll have to change the hypervisor and OS
60 if (size > 64)
61 fatal("SPARC T1 TLB registers don't support more than 64 TLB entries");
62
63 tlb = new TlbEntry[size];
64 std::memset(tlb, 0, sizeof(TlbEntry) * size);
64 std::memset((void *)tlb, 0, sizeof(TlbEntry) * size);
65
66 for (int x = 0; x < size; x++)
67 freeList.push_back(&tlb[x]);
68
69 c0_tsb_ps0 = 0;
70 c0_tsb_ps1 = 0;
71 c0_config = 0;
72 cx_tsb_ps0 = 0;

--- 1354 unchanged lines hidden --- 		65
66 for (int x = 0; x < size; x++)
67 freeList.push_back(&tlb[x]);
68
69 c0_tsb_ps0 = 0;
70 c0_tsb_ps1 = 0;
71 c0_config = 0;
72 cx_tsb_ps0 = 0;

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