33a34
> #include "base/bitfield.hh"
481a483,484
> if (AsiIsInterrupt(asi))
> panic("Interrupt ASIs not supported\n");
486a490,491
> if (AsiIsQueue(asi))
> goto handleQueueRegAccess;
544a550,563
> goto regAccessOk;
>
> handleQueueRegAccess:
> if (!priv && !hpriv) {
> writeSfr(tc, vaddr, write, Primary, true, IllegalAsi, asi);
> return new PrivilegedAction;
> }
> if (priv && vaddr & 0xF || vaddr > 0x3f8 || vaddr < 0x3c0) {
> writeSfr(tc, vaddr, write, Primary, true, IllegalAsi, asi);
> return new DataAccessException;
> }
> goto regAccessOk;
>
> regAccessOk:
577a597,600
> case ASI_QUEUE:
> pkt->set(tc->readMiscRegWithEffect(MISCREG_QUEUE_CPU_MONDO_HEAD +
> (va >> 4) - 0x3c));
> break;
674a698,702
> case ASI_QUEUE:
> assert(mbits(va,13,6) == va);
> tc->setMiscRegWithEffect(MISCREG_QUEUE_CPU_MONDO_HEAD +
> (va >> 4) - 0x3c, data);
> break;