511c511
< /*** End of normal Path ***/
---
> /** Normal flow ends here. */
513d512
< handleMmuRegAccess:
515c514,521
< panic("How are we ever going to deal with this?\n");
---
> if (vaddr > 0x38 || (vaddr >= 0x20 && vaddr < 0x30 && !hpriv)) {
> writeSfr(tc, vaddr, write, Primary, true, IllegalAsi, asi);
> return new DataAccessException;
> }
> handleMmuRegAccess:
> req->setMmapedIpr(true);
> req->setPaddr(req->getVaddr());
> return NoFault;
517a524,535
> Tick
> DTB::doMmuRegRead(ThreadContext *tc, Packet *pkt)
> {
> panic("need to implement DTB::doMmuRegRead()\n");
> }
>
> Tick
> DTB::doMmuRegWrite(ThreadContext *tc, Packet *pkt)
> {
> panic("need to implement DTB::doMmuRegWrite()\n");
> }
>