tlb.cc (4172:141705d83494) | tlb.cc (4191:c191c1fec061) |
---|---|
1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 679 unchanged lines hidden (view full) --- 688 if (AsiIsLittle(asi)) 689 panic("Little Endian ASIs not supported\n"); 690 if (AsiIsNoFault(asi)) 691 panic("No Fault ASIs not supported\n"); 692 693 if (AsiIsPartialStore(asi)) 694 panic("Partial Store ASIs not supported\n"); 695 | 1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 679 unchanged lines hidden (view full) --- 688 if (AsiIsLittle(asi)) 689 panic("Little Endian ASIs not supported\n"); 690 if (AsiIsNoFault(asi)) 691 panic("No Fault ASIs not supported\n"); 692 693 if (AsiIsPartialStore(asi)) 694 panic("Partial Store ASIs not supported\n"); 695 |
696 if (AsiIsCmt(asi)) 697 panic("Cmt ASI registers not implmented\n"); 698 |
|
696 if (AsiIsInterrupt(asi)) 697 goto handleIntRegAccess; 698 if (AsiIsMmu(asi)) 699 goto handleMmuRegAccess; 700 if (AsiIsScratchPad(asi)) 701 goto handleScratchRegAccess; 702 if (AsiIsQueue(asi)) 703 goto handleQueueRegAccess; --- 725 unchanged lines hidden --- | 699 if (AsiIsInterrupt(asi)) 700 goto handleIntRegAccess; 701 if (AsiIsMmu(asi)) 702 goto handleMmuRegAccess; 703 if (AsiIsScratchPad(asi)) 704 goto handleScratchRegAccess; 705 if (AsiIsQueue(asi)) 706 goto handleQueueRegAccess; --- 725 unchanged lines hidden --- |