1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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28 * Authors: Ali Saidi
29 */
30
31#include "arch/sparc/asi.hh"
32#include "arch/sparc/miscregfile.hh"
33#include "arch/sparc/tlb.hh"
34#include "base/trace.hh"
35#include "cpu/thread_context.hh"
36#include "sim/builder.hh"
37
38/* @todo remove some of the magic constants. -- ali
39 * */
40namespace SparcISA
41{
42
43TLB::TLB(const std::string &name, int s)

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422 ct = Nucleus;
423 context = 0;
424 } else {
425 asi = ASI_P;
426 ct = Primary;
427 context = tc->readMiscReg(MISCREG_MMU_P_CONTEXT);
428 }
429 } else if (!hpriv && !red) {
430 if (tl > 0) {
431 ct = Nucleus;
432 context = 0;
433 } else if (AsiIsSecondary(asi)) {
434 ct = Secondary;
435 context = tc->readMiscReg(MISCREG_MMU_S_CONTEXT);
436 } else {
437 context = tc->readMiscReg(MISCREG_MMU_P_CONTEXT);
438 ct = Primary; //???

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471 if (AsiIsBlock(asi))
472 panic("Block ASIs not supported\n");
473 if (AsiIsNoFault(asi))
474 panic("No Fault ASIs not supported\n");
475 if (AsiIsTwin(asi))
476 panic("Twin ASIs not supported\n");
477 if (AsiIsPartialStore(asi))
478 panic("Partial Store ASIs not supported\n");
479 if (AsiIsMmu(asi))
480 goto handleMmuRegAccess;
481
482 if (AsiIsScratchPad(asi))
483 goto handleScratchRegAccess;
484 }
485
486 if ((!lsuDm && !hpriv) || AsiIsReal(asi)) {
487 real = true;
488 context = 0;
489 };
490
491 if (hpriv && (implicit || (!AsiIsAsIfUser(asi) && !AsiIsReal(asi)))) {

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541 req->setMmapedIpr(true);
542 req->setPaddr(req->getVaddr());
543 return NoFault;
544};
545
546Tick
547DTB::doMmuRegRead(ThreadContext *tc, Packet *pkt)
548{
549 panic("need to implement DTB::doMmuRegRead()\n");
550}
551
552Tick
553DTB::doMmuRegWrite(ThreadContext *tc, Packet *pkt)
554{
555 panic("need to implement DTB::doMmuRegWrite()\n");
556}
557
558void
559TLB::serialize(std::ostream &os)
560{
561 panic("Need to implement serialize tlb for SPARC\n");
562}
563

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