registers.hh (9046:a1104cc13db2) | registers.hh (9917:7274310be1bb) |
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1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 43 unchanged lines hidden (view full) --- 52{ 53 IntReg intReg; 54 FloatReg fpreg; 55 MiscReg ctrlreg; 56} AnyReg; 57 58typedef uint16_t RegIndex; 59 | 1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 43 unchanged lines hidden (view full) --- 52{ 53 IntReg intReg; 54 FloatReg fpreg; 55 MiscReg ctrlreg; 56} AnyReg; 57 58typedef uint16_t RegIndex; 59 |
60// These enumerate all the registers for dependence tracking. 61enum DependenceTags { 62 FP_Base_DepTag = 32*3+9, 63 Ctrl_Base_DepTag = FP_Base_DepTag + 64, 64 Max_DepTag = Ctrl_Base_DepTag + NumMiscRegs 65}; 66 | |
67// semantically meaningful register indices 68const int ZeroReg = 0; // architecturally meaningful 69// the rest of these depend on the ABI 70const int ReturnAddressReg = 31; // post call, precall is 15 71const int ReturnValueReg = 8; // Post return, 24 is pre-return. 72const int StackPointerReg = 14; 73const int FramePointerReg = 30; 74 75// Some OS syscall use a second register (o1) to return a second value 76const int SyscallPseudoReturnReg = 9; 77 78const int NumIntArchRegs = 32; 79const int NumIntRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroIntRegs; 80 81const int TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs; 82 | 60// semantically meaningful register indices 61const int ZeroReg = 0; // architecturally meaningful 62// the rest of these depend on the ABI 63const int ReturnAddressReg = 31; // post call, precall is 15 64const int ReturnValueReg = 8; // Post return, 24 is pre-return. 65const int StackPointerReg = 14; 66const int FramePointerReg = 30; 67 68// Some OS syscall use a second register (o1) to return a second value 69const int SyscallPseudoReturnReg = 9; 70 71const int NumIntArchRegs = 32; 72const int NumIntRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroIntRegs; 73 74const int TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs; 75 |
76// These enumerate all the registers for dependence tracking. 77enum DependenceTags { 78 FP_Base_DepTag = NumIntRegs, 79 Ctrl_Base_DepTag = FP_Base_DepTag + NumFloatRegs, 80 Max_DepTag = Ctrl_Base_DepTag + NumMiscRegs 81}; 82 |
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83} // namespace SparcISA 84 85#endif | 83} // namespace SparcISA 84 85#endif |