registers.hh (10934:5af8f40d8f2c) | registers.hh (10935:acd48ddd725f) |
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1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 37 unchanged lines hidden (view full) --- 46 47typedef uint64_t IntReg; 48typedef uint64_t MiscReg; 49typedef float FloatReg; 50typedef uint32_t FloatRegBits; 51 52// dummy typedef since we don't have CC regs 53typedef uint8_t CCReg; | 1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 37 unchanged lines hidden (view full) --- 46 47typedef uint64_t IntReg; 48typedef uint64_t MiscReg; 49typedef float FloatReg; 50typedef uint32_t FloatRegBits; 51 52// dummy typedef since we don't have CC regs 53typedef uint8_t CCReg; |
54// vector register file entry type 55typedef uint64_t VectorRegElement; 56const int NumVectorRegElements = 0; 57const int VectorRegBytes = NumVectorRegElements * sizeof(VectorRegElement); 58typedef std::array<VectorRegElement, NumVectorRegElements> VectorReg; | |
59 60typedef union 61{ 62 IntReg intReg; 63 FloatReg fpreg; 64 MiscReg ctrlreg; 65} AnyReg; 66 --- 8 unchanged lines hidden (view full) --- 75const int FramePointerReg = 30; 76 77// Some OS syscall use a second register (o1) to return a second value 78const int SyscallPseudoReturnReg = 9; 79 80const int NumIntArchRegs = 32; 81const int NumIntRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroIntRegs; 82const int NumCCRegs = 0; | 54 55typedef union 56{ 57 IntReg intReg; 58 FloatReg fpreg; 59 MiscReg ctrlreg; 60} AnyReg; 61 --- 8 unchanged lines hidden (view full) --- 70const int FramePointerReg = 30; 71 72// Some OS syscall use a second register (o1) to return a second value 73const int SyscallPseudoReturnReg = 9; 74 75const int NumIntArchRegs = 32; 76const int NumIntRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroIntRegs; 77const int NumCCRegs = 0; |
83const int NumVectorRegs = 0; | |
84 85const int TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs; 86 87// These enumerate all the registers for dependence tracking. 88enum DependenceTags { 89 FP_Reg_Base = NumIntRegs, 90 CC_Reg_Base = FP_Reg_Base + NumFloatRegs, | 78 79const int TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs; 80 81// These enumerate all the registers for dependence tracking. 82enum DependenceTags { 83 FP_Reg_Base = NumIntRegs, 84 CC_Reg_Base = FP_Reg_Base + NumFloatRegs, |
91 Vector_Reg_Base = CC_Reg_Base + NumCCRegs, // NumCCRegs == 0 92 Misc_Reg_Base = Vector_Reg_Base + NumVectorRegs, // NumVectorRegs == 0 | 85 Misc_Reg_Base = CC_Reg_Base + NumCCRegs, // NumCCRegs == 0 |
93 Max_Reg_Index = Misc_Reg_Base + NumMiscRegs, 94}; 95 96} // namespace SparcISA 97 98#endif | 86 Max_Reg_Index = Misc_Reg_Base + NumMiscRegs, 87}; 88 89} // namespace SparcISA 90 91#endif |