1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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27 *
28 * Authors: Gabe Black
29 * Ali Saidi
30 */
31
32#ifndef __ARCH_SPARC_REGISTERS_HH__
33#define __ARCH_SPARC_REGISTERS_HH__
34
35#include "arch/generic/vec_reg.hh"
36#include "arch/sparc/generated/max_inst_regs.hh"
37#include "arch/sparc/miscregs.hh"
38#include "arch/sparc/sparc_traits.hh"
39#include "base/types.hh"
40
41namespace SparcISA
42{
43
44using SparcISAInst::MaxInstSrcRegs;
45using SparcISAInst::MaxInstDestRegs;
46using SparcISAInst::MaxMiscDestRegs;
47
48// dummy typedef since we don't have CC regs
49typedef uint8_t CCReg;
50
51// dummy typedefs since we don't have vector regs
52constexpr unsigned NumVecElemPerVecReg = 2;
53using VecElem = uint32_t;
54using VecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, false>;
55using ConstVecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, true>;
56using VecRegContainer = VecReg::Container;
57// This has to be one to prevent warnings that are treated as errors
58constexpr unsigned NumVecRegs = 1;
59
60// semantically meaningful register indices
61const int ZeroReg = 0; // architecturally meaningful
62// the rest of these depend on the ABI
63const int ReturnAddressReg = 31; // post call, precall is 15
64const int ReturnValueReg = 8; // Post return, 24 is pre-return.
65const int StackPointerReg = 14;
66const int FramePointerReg = 30;
67
68// Some OS syscall use a second register (o1) to return a second value
69const int SyscallPseudoReturnReg = 9;
70
71const int NumIntArchRegs = 32;
72const int NumIntRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroIntRegs;
73const int NumCCRegs = 0;
74
75const int TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs;
76
77} // namespace SparcISA
78
79#endif