includes.isa (3767:1178585ad790) | includes.isa (3918:1f9a98d198e8) |
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1// Copyright (c) 2006 The Regents of The University of Michigan | 1// Copyright (c) 2006-2007 The Regents of The University of Michigan |
2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright 9// notice, this list of conditions and the following disclaimer in the --- 19 unchanged lines hidden (view full) --- 29// Steve Reinhardt 30 31//////////////////////////////////////////////////////////////////// 32// 33// Output include file directives. 34// 35 36output header {{ | 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright 9// notice, this list of conditions and the following disclaimer in the --- 19 unchanged lines hidden (view full) --- 29// Steve Reinhardt 30 31//////////////////////////////////////////////////////////////////// 32// 33// Output include file directives. 34// 35 36output header {{ |
37#include <cstring> |
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37#include <sstream> 38#include <iostream> 39 | 38#include <sstream> 39#include <iostream> 40 |
41#include "cpu/static_inst.hh" |
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40#include "arch/sparc/faults.hh" | 42#include "arch/sparc/faults.hh" |
43#include "mem/request.hh" // some constructors use MemReq flags 44#include "mem/packet.hh" |
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41#include "arch/sparc/isa_traits.hh" 42#include "arch/sparc/regfile.hh" | 45#include "arch/sparc/isa_traits.hh" 46#include "arch/sparc/regfile.hh" |
43#include "base/misc.hh" 44#include "cpu/static_inst.hh" 45#include "mem/packet.hh" 46#include "mem/request.hh" // some constructors use MemReq flags | |
47}}; 48 49output decoder {{ 50#include "base/cprintf.hh" 51#include "base/loader/symtab.hh" 52#include "cpu/thread_context.hh" // for Jump::branchTarget() 53#include "mem/packet.hh" 54 --- 5 unchanged lines hidden (view full) --- 60using namespace SparcISA; 61}}; 62 63output exec {{ 64#if defined(linux) 65#include <fenv.h> 66#endif 67 | 47}}; 48 49output decoder {{ 50#include "base/cprintf.hh" 51#include "base/loader/symtab.hh" 52#include "cpu/thread_context.hh" // for Jump::branchTarget() 53#include "mem/packet.hh" 54 --- 5 unchanged lines hidden (view full) --- 60using namespace SparcISA; 61}}; 62 63output exec {{ 64#if defined(linux) 65#include <fenv.h> 66#endif 67 |
68#include <cmath> |
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68#include "arch/sparc/asi.hh" 69#include "cpu/base.hh" 70#include "cpu/exetrace.hh" 71#include "sim/sim_exit.hh" 72#include "mem/packet.hh" 73#include "mem/packet_access.hh" 74 75using namespace SparcISA; 76}}; 77 | 69#include "arch/sparc/asi.hh" 70#include "cpu/base.hh" 71#include "cpu/exetrace.hh" 72#include "sim/sim_exit.hh" 73#include "mem/packet.hh" 74#include "mem/packet_access.hh" 75 76using namespace SparcISA; 77}}; 78 |