1// Copyright (c) 2006-2007 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 37 unchanged lines hidden (view full) --- 46#include "cpu/static_inst.hh" 47#include "mem/packet.hh" 48#include "mem/request.hh" // some constructors use MemReq flags 49}}; 50 51output decoder {{ 52#include <algorithm> 53 |
54#include "arch/sparc/decoder.hh" |
55#include "base/loader/symtab.hh" 56#include "base/cprintf.hh" 57#include "base/fenv.hh" 58#include "cpu/thread_context.hh" // for Jump::branchTarget() 59#include "mem/packet.hh" 60 61using namespace SparcISA; 62}}; --- 23 unchanged lines hidden --- |