1// Copyright (c) 2006-2007 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 39 unchanged lines hidden (view full) --- 48}}; 49 50output decoder {{ 51#include "base/cprintf.hh" 52#include "base/loader/symtab.hh" 53#include "cpu/thread_context.hh" // for Jump::branchTarget() 54#include "mem/packet.hh" 55 |
56#include "base/fenv.hh" |
57#include <algorithm> 58 59using namespace SparcISA; 60}}; 61 62output exec {{ |
63#include "base/fenv.hh" |
64 |
65#if FULL_SYSTEM 66#include "sim/pseudo_inst.hh" 67#endif 68 69#include <limits> 70 71#include <cmath> 72#include "arch/sparc/asi.hh" 73#include "base/bigint.hh" 74#include "cpu/base.hh" 75#include "cpu/exetrace.hh" 76#include "sim/sim_exit.hh" 77#include "mem/packet.hh" 78#include "mem/packet_access.hh" 79 80using namespace SparcISA; 81using namespace std; 82}}; 83 |