1// Copyright (c) 2006-2007 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 20 unchanged lines hidden (view full) --- 29// Steve Reinhardt 30 31//////////////////////////////////////////////////////////////////// 32// 33// Output include file directives. 34// 35 36output header {{ |
37#include <sstream> 38#include <iostream> 39 40#include "cpu/static_inst.hh" 41#include "arch/sparc/faults.hh" 42#include "mem/request.hh" // some constructors use MemReq flags 43#include "mem/packet.hh" 44#include "arch/sparc/isa_traits.hh" --- 13 unchanged lines hidden (view full) --- 58 59using namespace SparcISA; 60}}; 61 62output exec {{ 63#if defined(linux) 64#include <fenv.h> 65#endif |
66#include <limits> |
67 |
68#include "arch/sparc/asi.hh" 69#include "cpu/base.hh" 70#include "cpu/exetrace.hh" 71#include "sim/sim_exit.hh" 72#include "mem/packet.hh" 73#include "mem/packet_access.hh" 74 75using namespace SparcISA; 76}}; 77 |