includes.isa (8232:b28d06a175be) | includes.isa (8442:b1f3dfae06f1) |
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1// Copyright (c) 2006-2007 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 56 unchanged lines hidden (view full) --- 65 66#if FULL_SYSTEM 67#include "sim/pseudo_inst.hh" 68#endif 69 70#include <cmath> 71#include <limits> 72 | 1// Copyright (c) 2006-2007 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 56 unchanged lines hidden (view full) --- 65 66#if FULL_SYSTEM 67#include "sim/pseudo_inst.hh" 68#endif 69 70#include <cmath> 71#include <limits> 72 |
73#include "arch/generic/memhelpers.hh" |
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73#include "arch/sparc/asi.hh" 74#include "base/bigint.hh" 75#include "cpu/base.hh" 76#include "cpu/exetrace.hh" 77#include "debug/Sparc.hh" 78#include "mem/packet.hh" 79#include "mem/packet_access.hh" 80#include "sim/sim_exit.hh" 81 82using namespace SparcISA; 83using namespace std; 84}}; 85 | 74#include "arch/sparc/asi.hh" 75#include "base/bigint.hh" 76#include "cpu/base.hh" 77#include "cpu/exetrace.hh" 78#include "debug/Sparc.hh" 79#include "mem/packet.hh" 80#include "mem/packet_access.hh" 81#include "sim/sim_exit.hh" 82 83using namespace SparcISA; 84using namespace std; 85}}; 86 |