1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Kevin Lim
30 */
31
32#ifndef __SPARC_FAULTS_HH__
33#define __SPARC_FAULTS_HH__
34
35#include "config/full_system.hh"
36#include "cpu/static_inst.hh"
37#include "sim/faults.hh"
38
39// The design of the "name" and "vect" functions is in sim/faults.hh
40
41namespace SparcISA
42{
43
44typedef uint32_t TrapType;
45typedef uint32_t FaultPriority;
46
47class ITB;
48
49class SparcFaultBase : public FaultBase
50{
51 public:
52 enum PrivilegeLevel
53 {
54 U, User = U,
55 P, Privileged = P,
56 H, Hyperprivileged = H,
57 NumLevels,
58 SH = -1,
59 ShouldntHappen = SH
60 };
61 struct FaultVals
62 {
63 const FaultName name;
64 const TrapType trapType;
65 const FaultPriority priority;
66 const PrivilegeLevel nextPrivilegeLevel[NumLevels];
67 FaultStat count;
68 };
69#if FULL_SYSTEM
70 void invoke(ThreadContext * tc,
71 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
72#endif
73 virtual TrapType trapType() = 0;
74 virtual FaultPriority priority() = 0;
75 virtual FaultStat & countStat() = 0;
76 virtual PrivilegeLevel getNextLevel(PrivilegeLevel current) = 0;
77};
78
79template<typename T>
80class SparcFault : public SparcFaultBase
81{
82 protected:
83 static FaultVals vals;
84 public:
| 1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Kevin Lim
30 */
31
32#ifndef __SPARC_FAULTS_HH__
33#define __SPARC_FAULTS_HH__
34
35#include "config/full_system.hh"
36#include "cpu/static_inst.hh"
37#include "sim/faults.hh"
38
39// The design of the "name" and "vect" functions is in sim/faults.hh
40
41namespace SparcISA
42{
43
44typedef uint32_t TrapType;
45typedef uint32_t FaultPriority;
46
47class ITB;
48
49class SparcFaultBase : public FaultBase
50{
51 public:
52 enum PrivilegeLevel
53 {
54 U, User = U,
55 P, Privileged = P,
56 H, Hyperprivileged = H,
57 NumLevels,
58 SH = -1,
59 ShouldntHappen = SH
60 };
61 struct FaultVals
62 {
63 const FaultName name;
64 const TrapType trapType;
65 const FaultPriority priority;
66 const PrivilegeLevel nextPrivilegeLevel[NumLevels];
67 FaultStat count;
68 };
69#if FULL_SYSTEM
70 void invoke(ThreadContext * tc,
71 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
72#endif
73 virtual TrapType trapType() = 0;
74 virtual FaultPriority priority() = 0;
75 virtual FaultStat & countStat() = 0;
76 virtual PrivilegeLevel getNextLevel(PrivilegeLevel current) = 0;
77};
78
79template<typename T>
80class SparcFault : public SparcFaultBase
81{
82 protected:
83 static FaultVals vals;
84 public:
|
85 FaultName name() const {return vals.name;}
86 TrapType trapType() {return vals.trapType;}
87 FaultPriority priority() {return vals.priority;}
88 FaultStat & countStat() {return vals.count;}
89 PrivilegeLevel getNextLevel(PrivilegeLevel current)
| 85 FaultName name() const { return vals.name; }
86 TrapType trapType() { return vals.trapType; }
87 FaultPriority priority() { return vals.priority; }
88 FaultStat & countStat() { return vals.count; }
89
90 PrivilegeLevel
91 getNextLevel(PrivilegeLevel current)
|
90 {
91 return vals.nextPrivilegeLevel[current];
92 }
93};
94
95class PowerOnReset : public SparcFault<PowerOnReset>
96{
97#if FULL_SYSTEM
98 void invoke(ThreadContext * tc,
99 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
100#endif
101};
102
103class WatchDogReset : public SparcFault<WatchDogReset> {};
104
105class ExternallyInitiatedReset : public SparcFault<ExternallyInitiatedReset> {};
106
107class SoftwareInitiatedReset : public SparcFault<SoftwareInitiatedReset> {};
108
109class REDStateException : public SparcFault<REDStateException> {};
110
111class StoreError : public SparcFault<StoreError> {};
112
113class InstructionAccessException : public SparcFault<InstructionAccessException> {};
114
| 92 {
93 return vals.nextPrivilegeLevel[current];
94 }
95};
96
97class PowerOnReset : public SparcFault<PowerOnReset>
98{
99#if FULL_SYSTEM
100 void invoke(ThreadContext * tc,
101 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
102#endif
103};
104
105class WatchDogReset : public SparcFault<WatchDogReset> {};
106
107class ExternallyInitiatedReset : public SparcFault<ExternallyInitiatedReset> {};
108
109class SoftwareInitiatedReset : public SparcFault<SoftwareInitiatedReset> {};
110
111class REDStateException : public SparcFault<REDStateException> {};
112
113class StoreError : public SparcFault<StoreError> {};
114
115class InstructionAccessException : public SparcFault<InstructionAccessException> {};
116
|
115//class InstructionAccessMMUMiss : public SparcFault {};
| 117// class InstructionAccessMMUMiss : public SparcFault<InstructionAccessMMUMiss> {};
|
116
117class InstructionAccessError : public SparcFault<InstructionAccessError> {};
118
119class IllegalInstruction : public SparcFault<IllegalInstruction> {};
120
121class PrivilegedOpcode : public SparcFault<PrivilegedOpcode> {};
122
| 118
119class InstructionAccessError : public SparcFault<InstructionAccessError> {};
120
121class IllegalInstruction : public SparcFault<IllegalInstruction> {};
122
123class PrivilegedOpcode : public SparcFault<PrivilegedOpcode> {};
124
|
123//class UnimplementedLDD : public SparcFault {};
| 125// class UnimplementedLDD : public SparcFault<UnimplementedLDD> {};
|
124
| 126
|
125//class UnimplementedSTD : public SparcFault {};
| 127// class UnimplementedSTD : public SparcFault<UnimplementedSTD> {};
|
126
127class FpDisabled : public SparcFault<FpDisabled> {};
128
129class FpExceptionIEEE754 : public SparcFault<FpExceptionIEEE754> {};
130
131class FpExceptionOther : public SparcFault<FpExceptionOther> {};
132
133class TagOverflow : public SparcFault<TagOverflow> {};
134
135class CleanWindow : public SparcFault<CleanWindow> {};
136
137class DivisionByZero : public SparcFault<DivisionByZero> {};
138
139class InternalProcessorError :
140 public SparcFault<InternalProcessorError>
141{
142 public:
| 128
129class FpDisabled : public SparcFault<FpDisabled> {};
130
131class FpExceptionIEEE754 : public SparcFault<FpExceptionIEEE754> {};
132
133class FpExceptionOther : public SparcFault<FpExceptionOther> {};
134
135class TagOverflow : public SparcFault<TagOverflow> {};
136
137class CleanWindow : public SparcFault<CleanWindow> {};
138
139class DivisionByZero : public SparcFault<DivisionByZero> {};
140
141class InternalProcessorError :
142 public SparcFault<InternalProcessorError>
143{
144 public:
|
143 bool isMachineCheckFault() const {return true;}
| 145 bool isMachineCheckFault() const { return true; }
|
144};
145
| 146};
147
|
146class InstructionInvalidTSBEntry : public SparcFault<InstructionInvalidTSBEntry> {};
| 148class InstructionInvalidTSBEntry :
149 public SparcFault<InstructionInvalidTSBEntry> {};
|
147
148class DataInvalidTSBEntry : public SparcFault<DataInvalidTSBEntry> {};
149
150class DataAccessException : public SparcFault<DataAccessException> {};
151
| 150
151class DataInvalidTSBEntry : public SparcFault<DataInvalidTSBEntry> {};
152
153class DataAccessException : public SparcFault<DataAccessException> {};
154
|
152//class DataAccessMMUMiss : public SparcFault {};
| 155// class DataAccessMMUMiss : public SparcFault<DataAccessMMUMiss> {};
|
153
154class DataAccessError : public SparcFault<DataAccessError> {};
155
156class DataAccessProtection : public SparcFault<DataAccessProtection> {};
157
158class MemAddressNotAligned :
159 public SparcFault<MemAddressNotAligned>
160{
161 public:
| 156
157class DataAccessError : public SparcFault<DataAccessError> {};
158
159class DataAccessProtection : public SparcFault<DataAccessProtection> {};
160
161class MemAddressNotAligned :
162 public SparcFault<MemAddressNotAligned>
163{
164 public:
|
162 bool isAlignmentFault() const {return true;}
| 165 bool isAlignmentFault() const { return true; }
|
163};
164
165class LDDFMemAddressNotAligned : public SparcFault<LDDFMemAddressNotAligned> {};
166
167class STDFMemAddressNotAligned : public SparcFault<STDFMemAddressNotAligned> {};
168
169class PrivilegedAction : public SparcFault<PrivilegedAction> {};
170
171class LDQFMemAddressNotAligned : public SparcFault<LDQFMemAddressNotAligned> {};
172
173class STQFMemAddressNotAligned : public SparcFault<STQFMemAddressNotAligned> {};
174
175class InstructionRealTranslationMiss :
176 public SparcFault<InstructionRealTranslationMiss> {};
177
178class DataRealTranslationMiss : public SparcFault<DataRealTranslationMiss> {};
179
| 166};
167
168class LDDFMemAddressNotAligned : public SparcFault<LDDFMemAddressNotAligned> {};
169
170class STDFMemAddressNotAligned : public SparcFault<STDFMemAddressNotAligned> {};
171
172class PrivilegedAction : public SparcFault<PrivilegedAction> {};
173
174class LDQFMemAddressNotAligned : public SparcFault<LDQFMemAddressNotAligned> {};
175
176class STQFMemAddressNotAligned : public SparcFault<STQFMemAddressNotAligned> {};
177
178class InstructionRealTranslationMiss :
179 public SparcFault<InstructionRealTranslationMiss> {};
180
181class DataRealTranslationMiss : public SparcFault<DataRealTranslationMiss> {};
182
|
180//class AsyncDataError : public SparcFault {};
| 183// class AsyncDataError : public SparcFault<AsyncDataError> {};
|
181
182template <class T>
183class EnumeratedFault : public SparcFault<T>
184{
185 protected:
186 uint32_t _n;
187 public:
188 EnumeratedFault(uint32_t n) : SparcFault<T>(), _n(n) {}
| 184
185template <class T>
186class EnumeratedFault : public SparcFault<T>
187{
188 protected:
189 uint32_t _n;
190 public:
191 EnumeratedFault(uint32_t n) : SparcFault<T>(), _n(n) {}
|
189 TrapType trapType() {return SparcFault<T>::trapType() + _n;}
| 192 TrapType trapType() { return SparcFault<T>::trapType() + _n; }
|
190};
191
192class InterruptLevelN : public EnumeratedFault<InterruptLevelN>
193{
194 public:
195 InterruptLevelN(uint32_t n) : EnumeratedFault<InterruptLevelN>(n) {;}
| 193};
194
195class InterruptLevelN : public EnumeratedFault<InterruptLevelN>
196{
197 public:
198 InterruptLevelN(uint32_t n) : EnumeratedFault<InterruptLevelN>(n) {;}
|
196 FaultPriority priority() {return 3200 - _n*100;}
| 199 FaultPriority priority() { return 3200 - _n*100; }
|
197};
198
199class HstickMatch : public SparcFault<HstickMatch> {};
200
201class TrapLevelZero : public SparcFault<TrapLevelZero> {};
202
203class InterruptVector : public SparcFault<InterruptVector> {};
204
205class PAWatchpoint : public SparcFault<PAWatchpoint> {};
206
207class VAWatchpoint : public SparcFault<VAWatchpoint> {};
208
209class FastInstructionAccessMMUMiss :
210 public SparcFault<FastInstructionAccessMMUMiss>
211{
212#if !FULL_SYSTEM
213 protected:
214 Addr vaddr;
215 public:
216 FastInstructionAccessMMUMiss(Addr addr) : vaddr(addr)
217 {}
218 void invoke(ThreadContext * tc,
219 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
220#endif
221};
222
223class FastDataAccessMMUMiss : public SparcFault<FastDataAccessMMUMiss>
224{
225#if !FULL_SYSTEM
226 protected:
227 Addr vaddr;
228 public:
229 FastDataAccessMMUMiss(Addr addr) : vaddr(addr)
230 {}
231 void invoke(ThreadContext * tc,
232 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
233#endif
234};
235
236class FastDataAccessProtection : public SparcFault<FastDataAccessProtection> {};
237
238class InstructionBreakpoint : public SparcFault<InstructionBreakpoint> {};
239
240class CpuMondo : public SparcFault<CpuMondo> {};
241
242class DevMondo : public SparcFault<DevMondo> {};
243
244class ResumableError : public SparcFault<ResumableError> {};
245
246class SpillNNormal : public EnumeratedFault<SpillNNormal>
247{
248 public:
249 SpillNNormal(uint32_t n) : EnumeratedFault<SpillNNormal>(n) {;}
| 200};
201
202class HstickMatch : public SparcFault<HstickMatch> {};
203
204class TrapLevelZero : public SparcFault<TrapLevelZero> {};
205
206class InterruptVector : public SparcFault<InterruptVector> {};
207
208class PAWatchpoint : public SparcFault<PAWatchpoint> {};
209
210class VAWatchpoint : public SparcFault<VAWatchpoint> {};
211
212class FastInstructionAccessMMUMiss :
213 public SparcFault<FastInstructionAccessMMUMiss>
214{
215#if !FULL_SYSTEM
216 protected:
217 Addr vaddr;
218 public:
219 FastInstructionAccessMMUMiss(Addr addr) : vaddr(addr)
220 {}
221 void invoke(ThreadContext * tc,
222 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
223#endif
224};
225
226class FastDataAccessMMUMiss : public SparcFault<FastDataAccessMMUMiss>
227{
228#if !FULL_SYSTEM
229 protected:
230 Addr vaddr;
231 public:
232 FastDataAccessMMUMiss(Addr addr) : vaddr(addr)
233 {}
234 void invoke(ThreadContext * tc,
235 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
236#endif
237};
238
239class FastDataAccessProtection : public SparcFault<FastDataAccessProtection> {};
240
241class InstructionBreakpoint : public SparcFault<InstructionBreakpoint> {};
242
243class CpuMondo : public SparcFault<CpuMondo> {};
244
245class DevMondo : public SparcFault<DevMondo> {};
246
247class ResumableError : public SparcFault<ResumableError> {};
248
249class SpillNNormal : public EnumeratedFault<SpillNNormal>
250{
251 public:
252 SpillNNormal(uint32_t n) : EnumeratedFault<SpillNNormal>(n) {;}
|
250 //These need to be handled specially to enable spill traps in SE
| 253 // These need to be handled specially to enable spill traps in SE
|
251#if !FULL_SYSTEM
252 void invoke(ThreadContext * tc,
253 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
254#endif
255};
256
257class SpillNOther : public EnumeratedFault<SpillNOther>
258{
259 public:
| 254#if !FULL_SYSTEM
255 void invoke(ThreadContext * tc,
256 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
257#endif
258};
259
260class SpillNOther : public EnumeratedFault<SpillNOther>
261{
262 public:
|
260 SpillNOther(uint32_t n) : EnumeratedFault<SpillNOther>(n) {;}
| 263 SpillNOther(uint32_t n) : EnumeratedFault(n)
264 {}
|
261};
262
263class FillNNormal : public EnumeratedFault<FillNNormal>
264{
265 public:
| 265};
266
267class FillNNormal : public EnumeratedFault<FillNNormal>
268{
269 public:
|
266 FillNNormal(uint32_t n) : EnumeratedFault<FillNNormal>(n) {;}
267 //These need to be handled specially to enable fill traps in SE
| 270 FillNNormal(uint32_t n) : EnumeratedFault(n)
271 {}
272 // These need to be handled specially to enable fill traps in SE
|
268#if !FULL_SYSTEM
269 void invoke(ThreadContext * tc,
270 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
271#endif
272};
273
274class FillNOther : public EnumeratedFault<FillNOther>
275{
276 public:
| 273#if !FULL_SYSTEM
274 void invoke(ThreadContext * tc,
275 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
276#endif
277};
278
279class FillNOther : public EnumeratedFault<FillNOther>
280{
281 public:
|
277 FillNOther(uint32_t n) : EnumeratedFault<FillNOther>(n) {;}
| 282 FillNOther(uint32_t n) : EnumeratedFault(n)
283 {}
|
278};
279
280class TrapInstruction : public EnumeratedFault<TrapInstruction>
281{
282 public:
| 284};
285
286class TrapInstruction : public EnumeratedFault<TrapInstruction>
287{
288 public:
|
283 TrapInstruction(uint32_t n) : EnumeratedFault<TrapInstruction>(n) {;}
284 //In SE, trap instructions are requesting services from the OS.
| 289 TrapInstruction(uint32_t n) : EnumeratedFault(n)
290 {}
291 // In SE, trap instructions are requesting services from the OS.
|
285#if !FULL_SYSTEM
286 void invoke(ThreadContext * tc,
287 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
288#endif
289};
290
| 292#if !FULL_SYSTEM
293 void invoke(ThreadContext * tc,
294 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
295#endif
296};
297
|
291static inline Fault genMachineCheckFault()
| 298static inline Fault
299genMachineCheckFault()
|
292{
293 return new InternalProcessorError;
294}
295
296
297} // SparcISA namespace
298
299#endif // __SPARC_FAULTS_HH__
| 300{
301 return new InternalProcessorError;
302}
303
304
305} // SparcISA namespace
306
307#endif // __SPARC_FAULTS_HH__
|