asi.hh (3806:65ae5388c059) | asi.hh (3823:1c8f87aa103e) |
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1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 94 unchanged lines hidden (view full) --- 103 ASI_DMMU_CTXT_ZERO_TSB_BASE_PS1 = 0x32, 104 ASI_DMMU_CTXT_ZERO_CONFIG = 0x33, 105 //0x34 implementation dependent 106 ASI_IMMU_CTXT_ZERO_TSB_BASE_PS0 = 0x35, 107 ASI_IMMU_CTXT_ZERO_TSB_BASE_PS1 = 0x36, 108 ASI_IMMU_CTXT_ZERO_CONFIG = 0x37, 109 //0x38 implementation dependent 110 ASI_DMMU_CTXT_NONZERO_TSB_BASE_PS0 = 0x39, | 1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 94 unchanged lines hidden (view full) --- 103 ASI_DMMU_CTXT_ZERO_TSB_BASE_PS1 = 0x32, 104 ASI_DMMU_CTXT_ZERO_CONFIG = 0x33, 105 //0x34 implementation dependent 106 ASI_IMMU_CTXT_ZERO_TSB_BASE_PS0 = 0x35, 107 ASI_IMMU_CTXT_ZERO_TSB_BASE_PS1 = 0x36, 108 ASI_IMMU_CTXT_ZERO_CONFIG = 0x37, 109 //0x38 implementation dependent 110 ASI_DMMU_CTXT_NONZERO_TSB_BASE_PS0 = 0x39, |
111 ASI_DMMU_CTXT_NONZERO_USB_BASE_PS1 = 0x3A, | 111 ASI_DMMU_CTXT_NONZERO_TSB_BASE_PS1 = 0x3A, |
112 ASI_DMMU_CTXT_NONZERO_CONFIG = 0x3B, 113 //0x3C implementation dependent 114 ASI_IMMU_CTXT_NONZERO_TSB_BASE_PS0 = 0x3D, | 112 ASI_DMMU_CTXT_NONZERO_CONFIG = 0x3B, 113 //0x3C implementation dependent 114 ASI_IMMU_CTXT_NONZERO_TSB_BASE_PS0 = 0x3D, |
115 ASI_IMMU_CTXT_NONZERO_USB_BASE_PS1 = 0x3E, | 115 ASI_IMMU_CTXT_NONZERO_TSB_BASE_PS1 = 0x3E, |
116 ASI_IMMU_CTXT_NONZERO_CONFIG = 0x3F, 117 ASI_STREAM_MA = 0x40, 118 //0x41 implementation dependent 119 ASI_SPARC_BIST_CONTROL = 0x42, 120 ASI_INST_MASK_REG = 0x42, 121 ASI_LSU_DIAG_REG = 0x42, 122 //0x43 implementation dependent 123 ASI_STM_CTL_REG = 0x44, --- 151 unchanged lines hidden --- | 116 ASI_IMMU_CTXT_NONZERO_CONFIG = 0x3F, 117 ASI_STREAM_MA = 0x40, 118 //0x41 implementation dependent 119 ASI_SPARC_BIST_CONTROL = 0x42, 120 ASI_INST_MASK_REG = 0x42, 121 ASI_LSU_DIAG_REG = 0x42, 122 //0x43 implementation dependent 123 ASI_STM_CTL_REG = 0x44, --- 151 unchanged lines hidden --- |