decoder.isa (12849:7f43ad13ebf0) decoder.isa (12850:7036cad54910)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2015 RISC-V Foundation
4// Copyright (c) 2017 The University of Virginia
5// All rights reserved.
6//
7// Redistribution and use in source and binary forms, with or without
8// modification, are permitted provided that the following conditions are

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1703 Rd = NPC;
1704 NPC = PC + imm;
1705 }}, IsDirectControl, IsUncondControl, IsCall);
1706
1707 0x1c: decode FUNCT3 {
1708 format SystemOp {
1709 0x0: decode FUNCT12 {
1710 0x0: ecall({{
1// -*- mode:c++ -*-
2
3// Copyright (c) 2015 RISC-V Foundation
4// Copyright (c) 2017 The University of Virginia
5// All rights reserved.
6//
7// Redistribution and use in source and binary forms, with or without
8// modification, are permitted provided that the following conditions are

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1703 Rd = NPC;
1704 NPC = PC + imm;
1705 }}, IsDirectControl, IsUncondControl, IsCall);
1706
1707 0x1c: decode FUNCT3 {
1708 format SystemOp {
1709 0x0: decode FUNCT12 {
1710 0x0: ecall({{
1711 fault = make_shared<SyscallFault>();
1711 fault = make_shared(
1712 (PrivilegeMode)xc->readMiscReg(MISCREG_PRV));
1712 }}, IsSerializeAfter, IsNonSpeculative, IsSyscall,
1713 No_OpClass);
1714 0x1: ebreak({{
1715 fault = make_shared<BreakpointFault>(xc->pcState());
1716 }}, IsSerializeAfter, IsNonSpeculative, No_OpClass);
1713 }}, IsSerializeAfter, IsNonSpeculative, IsSyscall,
1714 No_OpClass);
1715 0x1: ebreak({{
1716 fault = make_shared<BreakpointFault>(xc->pcState());
1717 }}, IsSerializeAfter, IsNonSpeculative, No_OpClass);
1717 0x100: eret({{
1718 fault = make_shared<UnimplementedFault>("eret",
1719 machInst);
1720 }}, No_OpClass);
1718 0x2: uret({{
1719 STATUS status = xc->readMiscReg(MISCREG_STATUS);
1720 status.uie = status.upie;
1721 status.upie = 1;
1722 xc->setMiscReg(MISCREG_STATUS, status);
1723 NPC = xc->readMiscReg(MISCREG_UEPC);
1724 }}, IsReturn);
1725 0x102: sret({{
1726 if (xc->readMiscReg(MISCREG_PRV) == PRV_U) {
1727 fault = make_shared<IllegalInstFault>(
1728 "sret in user mode", machInst);
1729 NPC = NPC;
1730 } else {
1731 STATUS status = xc->readMiscReg(MISCREG_STATUS);
1732 xc->setMiscReg(MISCREG_PRV, status.spp);
1733 status.sie = status.spie;
1734 status.spie = 1;
1735 status.spp = PRV_U;
1736 xc->setMiscReg(MISCREG_STATUS, status);
1737 NPC = xc->readMiscReg(MISCREG_SEPC);
1738 }
1739 }}, IsReturn);
1740 0x302: mret({{
1741 if (xc->readMiscReg(MISCREG_PRV) != PRV_M) {
1742 fault = make_shared<IllegalInstFault>(
1743 "mret at lower privilege", machInst);
1744 NPC = NPC;
1745 } else {
1746 STATUS status = xc->readMiscReg(MISCREG_STATUS);
1747 xc->setMiscReg(MISCREG_PRV, status.mpp);
1748 status.mie = status.mpie;
1749 status.mpie = 1;
1750 status.mpp = PRV_U;
1751 xc->setMiscReg(MISCREG_STATUS, status);
1752 NPC = xc->readMiscReg(MISCREG_MEPC);
1753 }
1754 }}, IsReturn);
1721 }
1722 }
1723 format CSROp {
1724 0x1: csrrw({{
1725 Rd = data;
1726 data = Rs1;
1727 }}, IsNonSpeculative, No_OpClass);
1728 0x2: csrrs({{

--- 23 unchanged lines hidden --- 		1755 }
1756 }
1757 format CSROp {
1758 0x1: csrrw({{
1759 Rd = data;
1760 data = Rs1;
1761 }}, IsNonSpeculative, No_OpClass);
1762 0x2: csrrs({{

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